z8f0822 ZiLOG Semiconductor, z8f0822 Datasheet - Page 80

• Manufacturer Part Number: z8f0822
• Description: High Performance 8-bit Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 37. Interrupt Edge Select Register (IRQES)
Table 38. Interrupt Control Register (IRQCTL)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Interrupt Edge Select Register
Interrupt Control Register
7
7
IRQE
IES7
R/W
The Interrupt Edge Select (IRQES) register
generated for the rising edge or falling edge on the selected GPIO Port input pin. The
minimum pulse width must be greater than 1 system clock to guarantee capture of the edge
triggered interrupt. Edge detection for pulses less than 1 system clock are not guaranteed.
IESx—Interrupt Edge Select x
0 = An interrupt request is generated on the falling edge of the PAx input.
1 = An interrupt request is generated on the rising edge of the PAx input.
Where x indicates the specific GPIO Port pin number (0 through 7).
The Interrupt Control (IRQCTL) register
interrupts.
IRQE—Interrupt Request Enable
This bit is set to 1 by execution of an EI (Enable Interrupts) or IRET (Interrupt Return)
instruction, or by a direct register write of a 1 to this bit. It is reset to 0 by executing a
DI
register write of a 0 to this bit.
0 = Interrupts are disabled.
1 = Interrupts are enabled.
Reserved—Must be 0
instruction, eZ8 CPU acknowledgement of an interrupt request, Reset or by a direct
6
6
IES6
5
5
IES5
4
4
IES4
FCDH
FCFH
R/W
0
(Table
0
3
3
Reserved
(Table
IES3
R
38) contains the master enable bit for all
37) determines whether an interrupt is
2
2
Z8 Encore! XP
IES2
Product Specification
1
1
IES1
®
Interrupt Controller
F0822 Series
0
0
IES0
67