mb95f118awpv2 Fujitsu Microelectronics, Inc., mb95f118awpv2 Datasheet - Page 26

• Manufacturer Part Number: mb95f118awpv2
• Description: 8-bit Proprietary Microcontrollers
• Manufacturer: Fujitsu Microelectronics, Inc.

26
MB95110A Series
Address
0FAC
0FAD
0F9C
0F9D
0FAA
0FAB
0FAE
0FAF
0F9A
0F9B
0F9E
0F9F
0FA0
0FA1
0FA2
0FA3
0FA4
0FA5
0FA6
0FA9
0F86
0F87
0F88
0F89
0F91
0F92
0F93
0F94
0F95
0F96
0F97
0F98
0F99
to
to
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
abbreviation
WRARH2
WRARL2
PDCRH0
PCSRH0
Register
PDCRL0
PDUTH0
PCSRL0
PDUTL0
WRDR2
T01CR0
T00CR0
T11CR0
T10CR0
TMCR0
TMCR1
T01DR
T00DR
T11DR
T10DR
PDS01
PDS00
PDS11
PDS10
PPS01
PPS00
PPS11
PPS10
PPGS
REVC
⎯
⎯
8/16-bit compound timer 01 control status register 0 ch.0
8/16-bit compound timer 00 control status register 0 ch.0
8/16-bit compound timer 11 control status register 0 ch.1
8/16-bit compound timer 10 control status register 0 ch.1
16-bit PPG cycle setting buffer register (Upper byte) ch.0
16-bit PPG cycle setting buffer register (Lower byte) ch.0
16-bit PPG duty setting buffer register (Upper byte) ch.0
16-bit PPG duty setting buffer register (Lower byte) ch.0
Wild register address setting register (Upper byte) ch.2
Wild register address setting register (Lower byte) ch.2
16-bit PPG down counter register (Upper byte) ch.0
16-bit PPG down counter register (Lower byte) ch.0
8/16-bit compound timer 00/01 timer mode control
8/16-bit compound timer 10/11 timer mode control
8/16-bit PPG1 cycle setting buffer register ch.0
8/16-bit PPG0 cycle setting buffer register ch.0
8/16-bit PPG1 cycle setting buffer register ch.1
8/16-bit PPG0 cycle setting buffer register ch.1
8/16-bit PPG1 duty setting buffer register ch.0
8/16-bit PPG0 duty setting buffer register ch.0
8/16-bit PPG1 duty setting buffer register ch.1
8/16-bit PPG0 duty setting buffer register ch.1
8/16-bit compound timer 01 data register ch.0
8/16-bit compound timer 00 data register ch.0
8/16-bit compound timer 11 data register ch.1
8/16-bit compound timer 10 data register ch.1
Wild register data setting register ch.2
8/16-bit PPG output inversion register
8/16-bit PPG starting register
Register name
register ch.0
register ch.1
(Disabled)
(Disabled)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
⎯
R
R
Initial value
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
11111111
11111111
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00000000
00000000
00000000
11111111
11111111
11111111
11111111
(Continued)
⎯
⎯
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B