mb95f108aspfv Fujitsu Microelectronics, Inc., mb95f108aspfv Datasheet - Page 54

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mb95f108aspfv

Manufacturer Part Number
mb95f108aspfv
Description
8-bit Proprietary Microcontrollers
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet

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54
MB95100A Series
Sampling at the falling edge of sampling clock*
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for t
(ESCR register : SCES bit = 1, ECCR register : SCDE bit = 1)
Serial clock cycle time
SCK↓→SOT delay time
Valid SIN→SCK↑
SCK↑ → valid SIN hold time
SOT→SCK↑ delay time
serial clock.
SCK
SOT
SIN
Parameter
2.4 V
0.8 V
0.8 V
0.2 V
Sym-
t
t
t
t
t
SOVHI
bol
SLOVI
SCYC
IVSHI
SHIXI
t
SOVHI
CC
CC
t
IVSHI
SCK, SOT
SCK, SOT
Pin name
SCK, SIN
SCK, SIN
SCK
1
MCLK
and enabled serial clock delay*
2.4 V
operating output pin :
C
.
L
(V
= 80 pF + 1 TTL.
Internal clock
Conditions
CC
t
SHIXI
= 3.3 V, AV
0.8 V
0.8 V
0.2 V
t
SCYC
SS
CC
CC
= V
t
SLOVI
t
2.4 V
0.8 V
MCLK
SS
5 t
= 0.0 V, T
Min
−95
*
MCLK
3
0
+ 190
*
2
2.4 V
3
Value
A
= −40 °C to + 85 °C)
4 t
Max
+ 95
MCLK
*
3
Unit
ns
ns
ns
ns
ns

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