mb95f108aspfv Fujitsu Microelectronics, Inc., mb95f108aspfv Datasheet - Page 53

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mb95f108aspfv

Manufacturer Part Number
mb95f108aspfv
Description
8-bit Proprietary Microcontrollers
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet

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Sampling at the rising edge of sampling clock*
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for t
(ESCR register : SCES bit = 0, ECCR register : SCDE bit = 1)
Serial clock cycle time
SCK↑→ SOT delay time
Valid SIN→SCK↓
SCK↓→ valid SIN hold time
SOT→SCK↓ delay time
serial clock.
SCK
SOT
SIN
Parameter
2.4 V
0.8 V
Sym-
0.8 V
0.2 V
t
t
t
t
t
bol
SHOVI
SOVLI
SCYC
IVSLI
SLIXI
t
SOVLI
CC
CC
t
IVSLI
SCK, SOT
SCK, SOT
Pin name
SCK, SIN
SCK, SIN
SCK
1
0.8 V
and enabled serial clock delay*
MCLK
operation output pin :
C
L
.
(V
= 80 pF + 1 TTL.
Internal clock
Conditions
CC
t
SLIXI
= 3.3 V, AV
2.4 V
0.8 V
0.2 V
t
SCYC
t
SHOVI
SS
CC
CC
MB95100A Series
= V
2.4 V
0.8 V
t
MCLK
SS
5 t
= 0.0 V, T
Min
−95
*
MCLK
3
0
+ 190
0.8 V
2
*
3
Value
A
= −40 °C to + 85 °C)
4 t
Max
+ 95
MCLK
*
3
Unit
ns
ns
ns
ns
ns
53

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