lpc2377 NXP Semiconductors, lpc2377 Datasheet - Page 26

• Manufacturer Part Number: lpc2377
• Description: Single-chip 16-bit/32-bit Microcontroller; 512 Kb ?ash With Isp/iap, Ethernet, Usb 2.0, Can, And 10-bit Adc/dac
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2377_78_4
Product data sheet
7.20.1 Features
7.21.1 Features
7.20 I
7.21 General purpose 32-bit timers/external event counters
The I
The I
and one word select signal. The basic I
master, and one slave. The I
and receive channel, each of which can operate as either a master or a slave.
The LPC2377/78 includes four 32-bit Timer/Counters. The Timer/Counter is designed to
count cycles of the system derived clock or an externally-supplied clock. It can optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. The Timer/Counter also includes four capture inputs to trap the timer
value when an input signal transitions, optionally generating an interrupt.
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S-bus serial I/O controllers
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
The interface has separate input/output channels each of which can operate in master
or slave mode.
Capable of handling 8-bit, 16-bit, and 32-bit word sizes.
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 48 kHz ((16, 22.05, 32, 44.1,
48) kHz).
Configurable word select period in master mode (separately for I
Two 8 word FIFO data buffers are provided, one for transmit and one for receive.
Generates interrupt requests when buffer levels cross a programmable boundary.
Two DMA requests, controlled by programmable buffer levels. These are connected to
the GPDMA block.
Controls include reset, stop and mute options separately for I
A 32-bit Timer/Counter with a programmable 32-bit prescaler.
Counter or Timer operation.
Up to four 32-bit capture channels per timer, that can take a snapshot of the timer
value when an input signal transitions. A capture event may also optionally generate
an interrupt.
Four 32-bit match registers that allow:
2
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S-bus provides a standard communication interface for digital audio applications.
S-bus specification defines a 3-wire serial bus using one data line, one clock line,
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C-bus can be used for test and diagnostic purposes.
Rev. 04 — 19 November 2008
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S interface on the LPC2377/78 provides a separate transmit
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S connection has one master, which is always the
Single-chip 16-bit/32-bit microcontroller
LPC2377/78
2
S input and I
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S input and output).
© NXP B.V. 2008. All rights reserved.
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S output.
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