lpc2210fbd144-01 NXP Semiconductors, lpc2210fbd144-01 Datasheet - Page 12

• Manufacturer Part Number: lpc2210fbd144-01
• Description: 16/32-bit Arm Microcontroller With 10-bit Adc And External Memory Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 4.
LPC2210_2220_5
Product data sheet
Symbol
P2.26/D26/
BOOT0
P2.27/D27/
BOOT1
P2.28/D28
P2.29/D29
P2.30/D30/
AIN4
P2.31/D31/
AIN5
P3.0 to P3.31
P3.0/A0
P3.1/A1
P3.2/A2
P3.3/A3
P3.4/A4
P3.5/A5
P3.6/A6
P3.7/A7
P3.8/A8
P3.9/A9
P3.10/A10
P3.11/A11
P3.12/A12
P3.13/A13
P3.14/A14
P3.15/A15
P3.16/A16
P3.17/A17
P3.18/A18
Pin description
Pin (LQFP)
13
16
17
18
19
20
89
88
87
81
80
74
73
72
71
66
65
64
63
62
56
55
53
48
47
[5]
[5]
[5]
[5]
[2]
[2]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
…continued
Pin (TFBGA) Type
F4
F1
G2
G1
G3
G4
G12
H13
H12
J10
K13
M13
N13
M12
N12
M10
N10
K9
L9
M9
K7
L7
M7
N5
M5
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[2]
[2]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
I/O
I
I/O
I
I/O
I/O
I/O
I
I/O
I
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Rev. 5 — 20 December 2007
16/32-bit ARM microcontrollers with external memory interface
Description
D26 — External memory data line 26.
BOOT0 — While RESET is LOW, together with BOOT1
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
D27 — External memory data line 27.
BOOT1 — While RESET is LOW, together with BOOT0
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
BOOT1:0 = 00 selects 8-bit memory on CS0 for boot.
BOOT1:0 = 01 selects 16-bit memory on CS0 for boot.
BOOT1:0 = 10 selects 32-bit memory on CS0 for boot.
BOOT1:0 = 11 selects 16-bit memory on CS0 for boot.
D28 — External memory data line 28.
D29 — External memory data line 29.
D30 — External memory data line 30.
AIN4 — ADC, input 4. This analog input is always connected
to its pin.
D31 — External memory data line 31.
AIN5 — ADC, input 5. This analog input is always connected
to its pin.
Port 3 — Port 3 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 3 pins
depends upon the pin function selected via the Pin Connect
Block.
A0 — External memory address line 0.
A1 — External memory address line 1.
A2 — External memory address line 2.
A3 — External memory address line 3.
A4 — External memory address line 4.
A5 — External memory address line 5.
A6 — External memory address line 6.
A7 — External memory address line 7.
A8 — External memory address line 8.
A9 — External memory address line 9.
A10 — External memory address line 10.
A11 — External memory address line 11.
A12 — External memory address line 12.
A13 — External memory address line 13.
A14 — External memory address line 14.
A15 — External memory address line 15.
A16 — External memory address line 16.
A17 — External memory address line 17.
A18 — External memory address line 18.
LPC2210/2220
© NXP B.V. 2007. All rights reserved.
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