lpc11c12 NXP Semiconductors, lpc11c12 Datasheet - Page 38

• Manufacturer Part Number: lpc11c12
• Description: 32-bit Cortex-m0 Microcontroller; 16/32 Flash, Sram; C_can
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 14.
[1]
[2]
[3]
[4]
LPC11C12_C14_0
Preliminary data sheet
Symbol
t
t
t
DH
v(Q)
h(Q)
T
main clock frequency f
and the SPI CPSDVSR parameter (specified in the SPI clock prescale register).
T
T
T
cy(clk)
amb
cy(clk)
amb
= −40 °C to 85 °C.
= 25 °C; for normal voltage supply range: V
= (SSPCLKDIV × (1 + SCR) × CPSDVSR) / f
= 12 × T
Dynamic characteristics of SPI pins in SPI mode
Parameter
data hold time
data output valid time in SPI mode
data output hold time in SPI mode
cy(PCLK)
main
.
Fig 20. SPI master timing in SPI mode
, the SPI peripheral clock divider (SSPCLKDIV), the SPI SCR parameter (specified in the SSP0CR0 register),
SCK (CPOL = 0)
SCK (CPOL = 1)
Conditions
in SPI mode
Pin names SCK, MISO, and MOSI refer to pins for both SPI peripherals, SPI0 and SPI1.
MOSI
MISO
MOSI
MISO
All information provided in this document is subject to legal disclaimers.
DD
main
= 3.3 V.
Rev. 00.05 — 6 May 2010
DATA VALID
DATA VALID
. The clock cycle time derived from the SPI bit rate T
t
v(Q)
[3][4]
[3][4]
[3][4]
DATA VALID
T
DATA VALID
cy(clk)
Min
3 × T
-
-
t
v(Q)
t
DS
DATA VALID
cy(PCLK)
DATA VALID
t
clk(H)
t
t
DH
DS
+ 4
DATA VALID
DATA VALID
Typ
-
-
-
t
clk(L)
t
DH
LPC11C12/C14
t
h(Q)
Max
-
3 × T
2 × T
t
cy(PCLK)
cy(PCLK)
h(Q)
cy(clk)
© NXP B.V. 2010. All rights reserved.
is a function of the
+ 11
+ 5
CPHA = 1
CPHA = 0
002aae829
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Unit
ns
ns
ns