p89lpc9171fdh NXP Semiconductors, p89lpc9171fdh Datasheet - Page 59

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p89lpc9171fdh

Manufacturer Part Number
p89lpc9171fdh
Description
8-bit Microcontroller With Accelerated Two-clock 80c51 Core, 2 Kb 3 V Byte-erasable Flash With 8-bit Adc
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
P89LPC9151_61_71_2
Product data sheet
7.28.2 Features
7.28.3 Flash organization
7.28.4 Using flash as data storage
7.28.5 Flash programming and erasing
7.28.6 ICP
P89LPC9151/9161/9171 uses V
algorithms. When voltage supply is lower than 2.4 V, the BOD FLASH is tripped and flash
erase/program is blocked.
The program memory consists of eight 256-byte sectors on the P89LPC9151/9161/9171
devices. Each sector can be further divided into 16-byte pages. In addition to sector
erase, page erase, and byte erase, a 16-byte page register is included which allows from
1 byte to 16 bytes of a given page to be programmed at the same time, substantially
reducing overall programming time. In addition, erasing and reprogramming of
user-programmable configuration bytes including UCFG1, the Boot Status Bit, and the
Boot Vector is supported.
The flash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
Two different methods of erasing or programming of the flash are available. The flash may
be programmed or erased in the end-user application (IA-Lite) under control of the
application’s firmware. Another option is to use the ICP mechanism. This ICP system
provides for programming through a serial clock/serial data interface. This device does not
provide for direct verification of code memory contents. Instead, this device provides a
32-bit CRC result on either a sector or the entire user code space.
Remark: When voltage supply is lower than 2.4 V, the BOD FLASH is tripped and flash
erase/program is blocked.
ICP is performed without removing the microcontroller from the system. The ICP facility
consists of internal hardware resources to facilitate remote programming of the
P89LPC9151/9161/9171 through a two-wire serial interface. The NXP ICP facility has
made in-circuit programming in an embedded application - using commercially available
programmers - possible with a minimum of additional expense in components and circuit
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ICP.
Any flash program/erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the flash for each sector.
100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
Rev. 02 — 9 February 2010
DD
as the supply voltage to perform the Program/Erase
P89LPC9151/9161/9171
8-bit microcontroller with 8-bit ADC
© NXP B.V. 2010. All rights reserved.
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