pic24hj16gp304 Microchip Technology Inc., pic24hj16gp304 Datasheet - Page 96

• Manufacturer Part Number: pic24hj16gp304
• Description: High-performance, 16-bit Microcontrollers
• Manufacturer: Microchip Technology Inc.

PIC24HJ32GP202/204 and PIC24HJ16GP304
9.1.1
In addition to the PORT, LAT and TRIS registers for
data control, each port pin can also be individually con-
figured for either digital or open-drain output. This is
controlled by the Open-Drain Control register, ODCx,
associated with each port. Setting any of the bits con-
figures the corresponding pin to act as an open-drain
output.
The open-drain feature allows the generation of
outputs higher than V
tal-only pins by using external pull-up resistors. The
maximum open-drain voltage allowed is the same as
the maximum V
9.2
The AD1PCFG and TRIS registers control the opera-
tion of the analog-to-digital (A/D) port pins. The port
pins that are desired as analog inputs must have their
corresponding TRIS bit set (input). If the TRIS bit is
cleared (output), the digital output level (V
will be converted.
When the PORT register is read, all pins configured as
analog input channels will read as cleared (a low level).
Pins configured as digital inputs will not convert an
analog input. Analog levels on any pin that is defined as
a digital input (including the ANx pins) can cause the
input buffer to consume current that exceeds the
device specifications.
EXAMPLE 9-1:
DS70289A-page 94
MOV
MOV
NOP
btss
0xFF00, W0
W0, TRISBB
PORTB, #13
Configuring Analog Port Pins
OPEN-DRAIN CONFIGURATION
IH
specification.
DD
PORT WRITE/READ EXAMPLE
(e.g., 5V) on any desired digi-
; Configure PORTB<15:8> as inputs
; and PORTB<7:0> as outputs
; Delay 1 cycle
; Next Instruction
OH
or V
Preliminary
OL
)
9.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP. An example is shown in EXAMPLE 9-
1: “Port Write/Read Example”.
9.3
The input change notification function of the I/O ports
allows
PIC24HJ16GP304 devices to generate interrupt
requests to the processor in response to a change-of-
state on selected input pins. This feature can detect
input change-of-states even in Sleep mode, when the
clocks are disabled. Depending on the device pin
count, up to 31 external signals (CNx pin) can be
selected (enabled) for generating an interrupt request
on a change-of-state.
Four control registers are associated with the CN mod-
ule. The CNEN1 and CNEN2 registers contain the
interrupt enable control bits for each of the CN input
pins. Setting any of these bits enables a CN interrupt
for the corresponding pins.
Each CN pin also has a weak pull-up connected to it.
The pull-ups act as a current source connected to the
pin, and eliminate the need for external resistors when
push button or keypad devices are connected. The
pull-ups are enabled separately using the CNPU1 and
CNPU2 registers, which contain the control bits for
each of the CN pins. Setting any of the control bits
enables the weak pull-ups for the corresponding pins.
Note:
Input Change Notification
I/O PORT WRITE/READ TIMING
Pull-ups on change notification pins
should always be disabled when the port
pin is configured as a digital output.
the
PIC24HJ32GP202/204
© 2007 Microchip Technology Inc.
and