pic24hj16gp304 Microchip Technology Inc., pic24hj16gp304 Datasheet - Page 93

• Manufacturer Part Number: pic24hj16gp304
• Description: High-performance, 16-bit Microcontrollers
• Manufacturer: Microchip Technology Inc.

8.0
The PIC24HJ32GP202/204 and PIC24HJ16GP304
devices provide the ability to manage power consump-
tion by selectively managing clocking to the CPU and
the peripherals. In general, a lower clock frequency and
a reduction in the number of circuits being clocked con-
stitutes lower consumed power. PIC24HJ32GP202/
204 and PIC24HJ16GP304 devices can manage
power consumption in four different ways:
• Clock frequency
• Instruction-based Sleep and Idle modes
• Software-controlled Doze mode
• Selective peripheral control in software
Combinations of the above methods can be used to
selectively customize an application’s power consump-
tion while still maintaining critical application features,
such as timing-sensitive communications.
8.1
PIC24HJ32GP202/204 and PIC24HJ16GP304 devices
allow a wide range of clock frequencies to be selected
under application control. If the system clock configura-
tion is not locked, users can choose low-power or high-
precision oscillators by simply changing the NOSC bits
(OSCCON<10:8>). The process of changing a system
clock during operation, as well as limitations to the pro-
cess, are discussed in more detail in Section 7.0
“Oscillator Configuration”.
EXAMPLE 8-1:
© 2007 Microchip Technology Inc.
PWRSAV #SLEEP_MODE
PWRSAV #IDLE_MODE
Note:
POWER-SAVING FEATURES
Clock Frequency and Clock
Switching
This data sheet summarizes the features
of
PIC24HJ16GP304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”.
PIC24HJ32GP202/204 and PIC24HJ16GP304
the
PWRSAV INSTRUCTION SYNTAX
PIC24HJ32GP202/204
; Put the device into SLEEP mode
; Put the device into IDLE mode
and
Preliminary
8.2
PIC24HJ32GP202/204 and PIC24HJ16GP304 devices
have two special power-saving modes that are entered
through the execution of a special PWRSAV instruction.
Sleep mode stops clock operation and halts all code
execution. Idle mode halts the CPU and code execu-
tion, but allows peripheral modules to continue opera-
tion. Example 8-1 shows the Assembler syntax of the
PWRSAV instruction.
Sleep and Idle modes can be exited as a result of an
enabled interrupt, WDT time-out or a device Reset. When
the device exits these modes, it is said to wake-up.
8.2.1
In the Sleep mode,
• The system clock source is shut down. If an on-
• The device current consumption is reduced to a
• The Fail-Safe Clock Monitor does not operate,
• The LPRC clock continues to run if the WDT is
• The WDT, if enabled, is automatically cleared
• Some device features or peripherals may continue
• Any peripheral that requires the system clock
The device will wake-up from Sleep mode on any of
these events:
• Any interrupt source that is individually enabled
• Any form of device Reset
• A WDT time-out
On wake-up from Sleep mode, the processor restarts
with the same clock source that was active when Sleep
mode was entered.
chip oscillator is used, it is turned off.
minimum, provided that no I/O pin is sourcing
current.
since the system clock source is disabled.
enabled.
prior to entering Sleep mode.
to operate. This includes items such as the input
change notification on the I/O ports, or peripherals
that use an external clock input.
source for its operation is disabled.
Note:
Instruction-Based Power-Saving
Modes
SLEEP MODE
SLEEP_MODE and IDLE_MODE are
constants defined in the assembler
include file for the selected device.
DS70289A-page 91