attiny15l ATMEL Corporation, attiny15l Datasheet - Page 32

• Manufacturer Part Number: attiny15l
• Description: Attiny15l 8-bit Microcontroller With 1k Byte Flash
• Manufacturer: ATMEL Corporation

Timer/Counter1 Output
Compare RegisterB – OCR1B
32
ATtiny15L
Figure 22. Effects of Unsynchronized OCR Latching
During the time between the write and the latch operation, a read from OCR1A will read
the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A.
When OCR1A contains $00 or the top value, as specified in OCR1B Register, the output
PB1(OC1A) is held low or high according to the settings of COM1A1/COM1A0. This is
shown in Table 13.
The Output Compare Register1 (OCR1B) is an 8-bit read/write register. This register is
used in the PWM mode only, and it limits the top value to which the Timer/Counter1
keeps counting. After reaching OCR1B in PWM mode, the counter starts from $00.
Table 13. PWM Outputs when OCR1A = $00 or OCR1B
In PWM mode, the Timer Overflow Flag (TOV1) is set as in normal Timer/Counter
mode. Timer Overflow Interrupt1 operates exactly as in normal Timer/Counter mode,
i.e., it is executed when TOV1 is set provided that Timer Overflow Interrupt and global
interrupts are enabled. This also applies to the Timer Output Compare A Flag and
interrupt.
Bit
$2D
Read/Write
Initial Value
Synchronized OC1A Latch
Unsynchronized OC1A Latch
COM1A1
1
1
1
1
MSB
R/W
7
1
R/W
6
1
COM1A0
0
0
1
1
R/W
5
1
R/W
4
1
Glitch
Compare Value Changes
Compare Value Changes
OCR1B
OCR1B
OCR1B
R/W
$00
$00
3
1
R/W
2
1
R/W
1
1
Counter Value
Compare Value
PWM Output OC1A
Counter Value
Compare Value
PWM Output OC1A
Output PWMn
LSB
R/W
H
H
0
1
L
L
1187H–AVR–09/07
OCR1B