attiny24v ATMEL Corporation, attiny24v Datasheet - Page 80

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attiny24v

Manufacturer Part Number
attiny24v
Description
8-bit Avr Microcontroller With 2/4/8k Bytes Insystem Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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11.9
11.9.1
80
Register Description
ATtiny24/44/84
TCCR0A – Timer/Counter Control Register A
Figure 11-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 11-2.
Table 11-3
TCNTn
(clk
OCRnx
Bit
0x30 (0x50)
Read/Write
Initial Value
(CTC)
OCFnx
clk
clk
COM0A1
I/O
I/O
Tn
/8)
0
0
1
1
shows COM0A1:0 bit functionality when WGM01:0 bits are set to fast PWM mode.
caler (f
Compare Output Mode, non-PWM Mode
COM0A1
R/W
COM0A0
7
0
0
1
0
1
clk_I/O
Table 11-2
TOP - 1
COM0A0
R/W
/8)
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
shows the COM0A1:0 bit functionality when the WGM02:0 bits
COM0B1
R/W
5
0
COM0B0
TOP
R/W
4
0
TOP
R
3
0
BOTTOM
R
2
0
WGM01
R/W
1
0
WGM00
R/W
0
0
BOTTOM + 1
8006H–AVR–10/09
TCCR0A

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