lm20133mhx National Semiconductor Corporation, lm20133mhx Datasheet - Page 14

• Manufacturer Part Number: lm20133mhx
• Description: 3a, Powerwise Synchronous Buck Regulator With Input Synchronization
• Manufacturer: National Semiconductor Corporation

www.national.com
Where, C
L (H) is the value of the inductor, V
voltage drop ignoring loop bandwidth considerations, ΔI
STEP
capacitor ESR, V
the set regulator output voltage. Both the tolerance and volt-
age coefficient of the capacitor needs to be examined when
designing for a specific output ripple or transient drop target.
INPUT CAPACITOR SELECTION (C
Good quality input capacitors are necessary to limit the ripple
voltage at the VIN pin while supplying most of the switch cur-
rent during the on-time. In general it is recommended to use
a ceramic capacitor for the input as they provide both a low
impedance and small footprint. One important note is to use
a good dielectric for the ceramic capacitor such as X5R or
X7R. These provide better over temperature performance
and minimize the DC voltage derating that occurs on Y5V ca-
pacitors. For most applications, a 22 µF, X5R, 6.3V input
capacitor is sufficient; however, additional capacitance may
be required if the connection to the input supply is far from the
PVIN pins. The input capacitor should be placed as close as
possible PVIN and PGND pins of the device.
Non-ceramic input capacitors should be selected for RMS
current rating and minimum ripple voltage. A good approxi-
mation for the required ripple current rating is given by the
relationship:
As indicated by the RMS ripple current equation, highest re-
quirement for RMS current rating occurs at 50% duty cycle.
For this case, the RMS ripple current rating of the input ca-
pacitor should be greater than half the output current. For best
performance, low ESR ceramic capacitors should be placed
in parallel with higher capacitance capacitors to provide the
best input filtering for the device.
SETTING THE OUTPUT VOLTAGE (R
The resistors R
voltage for the device. Table 1, shown below, provides sug-
gestions for R
If different output voltages are required, R
lected to be between 4.99 kΩ to 49.9 kΩ and R
calculated using the equation below.
(A) is the load step change, R
TABLE 1. Suggested Values for R
OUT
(F) is the minimum required output capacitance,
FB1
R
FB1
FB1
short
4.99
8.87
12.7
21.5
31.6
IN
and R
(kΩ)
and R
(V) is the input voltage, and V
FB2
R
FB2
for common output voltages.
FB2
open
10.2
10.2
10.2
10.2
10
are selected to set the output
(kΩ)
DROOP
IN
ESR
)
V
FB1
0.8
1.2
1.5
1.8
2.5
3.3
OUT
FB1
, R
(Ω) is the output
FB2
(V) is the output
and R
FB2
should be se-
)
FB1
OUT
FB2
can be
(V) is
OUT-
14
LOOP COMPENSATION (R
The purpose of loop compensation is to meet static and dy-
namic performance requirements while maintaining adequate
stability. Optimal loop compensation depends on the output
capacitor, inductor, load, and the device itself. Table 2 below
gives values for the compensation network that will result in
a stable system when using a 100 µF, 6.3V ceramic X5R out-
put capacitor and 1 µH inductor.
If the desired solution differs from the table above the loop
transfer function should be analyzed to optimize the loop
compensation. The overall loop transfer function is the prod-
uct of the power stage and the feedback network transfer
functions. For stability purposes, the objective is to have a
loop gain slope that is -20db/decade from a very low frequen-
cy to beyond the crossover frequency. Figure 4, shown below,
shows the transfer functions for power stage, feedback/com-
pensation network, and the resulting closed loop system for
the LM20133.
TABLE 2. Recommended Compensation for
FIGURE 4. LM20133 Loop Compensation
C
OUT
5.00
5.00
5.00
5.00
5.00
5.00
3.30
3.30
3.30
3.30
V
IN
= 100 µF, L = 1 µH & f
V
3.30
2.50
1.80
1.50
1.20
0.80
1.80
1.50
1.20
0.80
OUT
C1
C
, C
C1
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
C1
(nF) R
)
SW
= 1 MHz
C1
16.2
11.3
8.45
5.23
3.32
1.62
9.53
4.87
3.24
1.62
(kΩ)
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