lm78ccvf National Semiconductor Corporation, lm78ccvf Datasheet - Page 15

• Manufacturer Part Number: lm78ccvf
• Description: Microprocessor System Hardware Monitor
• Manufacturer: National Semiconductor Corporation

Functional Description
2.2 Serial Bus Interface
When using the Serial Bus Interface a write will always
consist of the LM78 Serial Bus Interface Address byte, fol-
lowed by the Internal Address Register byte, then the data
byte. There are two cases for a read:
1. If the Internal Address Register is known to be at the
2. If the Internal Address Register value is unknown, write
In all other respects the LM78 functions identically for Serial
Bus communications as it does for ISA communications.
desired Address, simply read the LM78 with the Serial
Bus Interface Address byte, followed by the data byte
read from the LM78.
to the LM78 with the Serial Bus Interface Address byte,
followed by the Internal Address Register byte. Then
restart the Serial Communication with a Read consisting
of the Serial Bus Interface Address byte, followed by the
data byte read from the LM78.
(c) Serial Bus Read from a Register with the Internal Address Register Preset to Desired Location
(a) Serial Bus Write to the Internal Address Register followed by the Data Byte
(b) Serial Bus Write to the Internal Address Register Only
(Continued)
FIGURE 7. Serial Bus Timing
15
Auto-Increment does not operate. When writing to or reading
from a Register which Auto-Increments with ISA communi-
cations, the Register must be manually incremented for
Serial Bus communications.
The default power on Serial Bus address for the LM78 is:
0101101 binary. This address can be changed by writing any
desired value to the Serial Bus address register, which can
be done either via the ISA or Serial Bus. During and Serial
Bus communication on the BUSY bit (bit 7) in the address
register at x5h will be high, and any ISA activity in that
situation should be limited to reading port x5h only.
All of these communications are depicted in the Serial Bus
Interface Timing Diagrams as shown in Figure 7 .
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