lnbh25pqr STMicroelectronics, lnbh25pqr Datasheet - Page 19

• Manufacturer Part Number: lnbh25pqr
• Description: Lnb Supply And Control Ic With Step-up And I²c Interface
• Manufacturer: STMicroelectronics

LNBH25
7.2
S
S
MSB
0
0
Read mode transmission
In Read mode the bytes sequence must be as follows:
●
●
●
●
●
●
●
Figure 12. Example of reading procedure starting with first status address 0X0
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, set the values to select the CHIP ADDRESS (see Chip Address in
selection) and to select the REGISTER Address (see
b. The reading procedure can start from any register address (Status 1, 2 or Data1..4) by simply setting the X
MSB
MSB
0
0
CHIP ADDRESS
values in the register address byte (after the first Chip Address in the above figure). It can be also stopped from
the master by sending a stop condition after any acknowledge bit.
0
0
a start condition (S)
a chip address byte with the LSB bit R/W=0
the register address byte of the internal first register to be accessed
a stop condition (P)
a new master transmission with the chip address byte and the LSB bit R/W=1
after the acknowledge the LNBH25 starts to send the addressed register content. As
long as the master keeps the acknowledge LOW, the LNBH25 transmits the next
address register byte content.
the transmission is terminated when the master sets the acknowledge HIGH with a
following stop bit.
1
1
Add=0x2
Add=0x2
DATA 1
DATA 1
0
0
0
X
X
LSB
LSB
LSB
MSB
MSB
MSB
0
0
REGISTER ADDRESS
MSB
MSB
0 0
0 0
STATUS 1
STATUS 1
Add=0x0
Add=0x0
0 0 X
0 0 X
Add=0x3
Add=0x3
DATA 2
DATA 2
Doc ID 022433 Rev 3
LSB
LSB
X X
X X
LSB
LSB
LSB
MSB
MSB
MSB
MSB
P
P
STATUS 2
STATUS 2
Add=0x1
Add=0x1
S
S
Add=0x4
Add=0x4
DATA 3
DATA 3
MSB
0
0
0
0
CHIP ADDRESS
Table 7
LSB
LSB
0
0
1
1
LSB
LSB
0
0
).
0
MSB
MSB
X
X
LSB
I²C interface protocol
DATA 4
DATA 4
Add=0x5
Add=0x5
Table 16
LSB
LSB
AM09914v2
for pin
P P
(b)
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