NBSG53AMNR2 ON Semiconductor, NBSG53AMNR2 Datasheet

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NBSG53AMNR2

Manufacturer Part Number
NBSG53AMNR2
Description
IC FLIP FLOP DIFF CLOCK 16QFN
Manufacturer
ON Semiconductor
Type
D-Type Busr
Datasheet

Specifications of NBSG53AMNR2

Function
Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
2
Frequency - Clock
8GHz
Trigger Type
Positive, Negative
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output High, Low
-
Delay Time - Propagation
-
Other names
NBSG53AMNR2OSTR
NBSG53A
2.5V/3.3V SiGe Selectable
Differential Clock and Data
D Flip-Flop/Clock Divider
with Reset and OLS*
fixed divide by two (DIV/2) clock generator. This is a part of the
GigaComm™ family of high performance Silicon Germanium
products. A strappable control pin is provided to select between the
two functions. The device is housed in a low profile 4x4 mm 16−pin
Flip−Chip BGA (FCBGA) or a 3x3 mm 16 pin QFN package.
inputs. Differential inputs incorporate internal 50 W termination
resistors and accept NECL (Negative ECL), PECL (Positive ECL),
LVCMOS/LVTTL, CML, or LVDS. The OLS* input is used to
program the peak−to−peak output amplitude between 0 and 800 mV
in five discrete steps. The RESET and SELECT inputs are
single−ended and can be driven with either LVECL or
LVCMOS/LVTTL input levels.
The differential clock inputs of the NBSG53A allow the device to also
be used as a negative edge triggered device.
Features
*Output Level Select
© Semiconductor Components Industries, LLC, 2008
September, 2008 − Rev. 13
The NBSG53A is a multi−function differential D flip−flop (DFF) or
The NBSG53A is a device with data, clock, OLS*, reset, and select
Data is transferred to the outputs on the positive edge of the clock.
(See Figures 4, 6, 8, 10, and 11)
(See Figures 5, 7, 9, 10, and 11)
Selectable Swing PECL Output with Operating Range: V
to 3.465 V with V
Selectable Swing NECL Output with NECL Inputs with
Operating Range: V
Peak−to−Peak Output)
Maximum Input Clock Frequency (DFF) > 8 GHz Typical
Maximum Input Clock Frequency (DIV/2) > 10 GHz Typical
210 ps Typical Propagation Delay (OLS = FLOAT)
45 ps Typical Rise and Fall Times (OLS = FLOAT)
DIV/2 Mode (Active with Select Low)
DFF Mode (Active with Select High)
Selectable Output Level (0 V, 200 mV, 400 mV, 600 mV, or 800 mV
50 W Internal Input Termination Resistors on all Differential Inputs
Pb−Free Packages are Available
EE
CC
= 0 V
= 0 V with V
EE
= −2.375 V to −3.465 V
CC
1
= 2.375 V
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
(Note: Microdot may be in either location)
*For additional marking information, refer to
CASE 485G
MN SUFFIX
Application Note AND8002/D.
FCBGA−16
BA SUFFIX
QFN−16
CASE 489
ORDERING INFORMATION
1
A
L
Y
W
G
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Publication Order Number:
1
Ç Ç Ç Ç
Ç Ç
DIAGRAM*
MARKING
16
ALYWG
ALYWG
53A
SG
53A
SG
NBSG53A/D
G
G

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NBSG53AMNR2 Summary of contents

Page 1

NBSG53A 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS* The NBSG53A is a multi−function differential D flip−flop (DFF) or fixed divide by two (DIV/2) clock generator. This is a part of the GigaComm™ family of ...

Page 2

A VTD D D VTD B CLK VTCLK CLK VTCLK SEL OLS CC D Figure 1. BGA−16 Pinout (Top View) Table 1. PIN DESCRIPTION Pin BGA QFN Name C2 1 ...

Page 3

V OLS VTD VTD VTCLK 50 W CLK CLK 50 W VTCLK R SEL Table 2. OUTPUT LEVEL SELECT (OLS) OLS Q/Q VPP V 800 − 0.4 V ...

Page 4

Table 5. ATTRIBUTES Positive Operating Voltage Range for V Negative Operating Voltage Range for V Internal Input Pulldown Resistor (R, SEL) ESD Protection Moisture Sensitivity (Note 5) Flammability Rating Oxygen Index Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC ...

Page 5

Table 7. DC CHARACTERISTICS, INPUT WITH PECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note 9) OL (OLS = V (OLS = V CC (OLS = V ...

Page 6

Table 8. DC CHARACTERISTICS, INPUT WITH PECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note 15 Output LOW Voltage (Note 15) OL (OLS = V (OLS = V CC (OLS = V ...

Page 7

Table 9. DC CHARACTERISTICS, NECL INPUT WITH NECL OUTPUT −3.465 V to −2.375 V (Note 20 Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note 21 ...

Page 8

Table 9. DC CHARACTERISTICS, NECL INPUT WITH NECL OUTPUT −3.465 V to −2.375 V (Note 20) (continued Symbol Symbol Characteristic Characteristic V Input HIGH Voltage Common IHCMR Mode Range (Differential Configuration) (Note ...

Page 9

Table 10. AC CHARACTERISTICS for FCBGA− −3.465 V to −2.375 Symbol Characteristic f Maximum Frequency max (See Figures 10, and 11) (See Figures ...

Page 10

Table 11. AC CHARACTERISTICS for QFN− −3.465 V to −2.375 Symbol Characteristic f Maximum Frequency max (See Figures 10, and 11) (See Figures ...

Page 11

OLS = V 800 700 OLS = V 600 *OLS = V 500 400 OLS = V 300 200 100 Figure 4. Output Voltage Amplitude (V Input Frequency (f ) for DFF Mode (V in 900 ...

Page 12

OLS = V 800 700 OLS = V 600 500 *OLS = V 400 OLS = V 300 200 100 Figure 6. Output Voltage Amplitude (V Input Frequency (f ) for DFF Mode (V in 900 ...

Page 13

V (Q) OH 1100 1000 900 V (Q) OH 800 700 600 V (Q) OL 500 400 300 V 200 100 INPUT FREQUENCY (GHz) Figure (Q/Q) vs. Input ...

Page 14

DIV/2 Mode DFF Mode INPUT FREQUENCY (GHz) Figure 10. Duty Cycle % vs. Input Frequency (f (V − 3.3 V ...

Page 15

V V − 400 V − 800 OLS Figure 12. Typical OLS Input Current vs. OLS Input Voltage (V − 3 ...

Page 16

... Application Note AND8020/D − Termination of ECL Logic Devices) ORDERING INFORMATION Device NBSG53ABAHTBG NBSG53ABA NBSG53ABAR2 NBSG53AMN NBSG53AMNG NBSG53AMNR2 NBSG53AMNR2G NBSG53AMNHTBG Board NBSG53ABAEVB †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe- cifications Brochure, BRD8011/D. CLK V INPP ...

Page 17

PLASTIC (mm) BGA FLIP CHIP PACKAGE LASER MARK FOR PIN 1 IDENTIFICATION IN −X− THIS AREA D −Y− VIEW M− DETAIL K _ ...

Page 18

... Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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