W83783S Information Storage Devices, Inc, W83783S Datasheet - Page 37

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W83783S

Manufacturer Part Number
W83783S
Description
H/w Monitor: 3 Temp.(thermal Diode), 6 Vol., 2 PWM Fan Control
Manufacturer
Information Storage Devices, Inc
Datasheet

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7.14 FAN IN/OUT and BEEP/GPO# Control Register - Index 4Dh
Register Location:
Power on Default Value
Attribute:
Size:
Bit 7: Disable power-on abnormal the monitor voltage including V-Core A and +3.3V. If these voltage
Bit 6: BEEP/GPO# Pin Function Select. Write 1 Select GPO# function. Set 0, select BEEP function.
Bit 5: FAN 3 output value if FANINC3 sets to 0. Write 1, then pin 4 always generate logic high
Bit 4: FAN 3 Input Control. Set to 1, pin 4 acts as FAN clock input, which is default value. Set to 0,
Bit 3: FAN 2 output value if FANINC2 sets to 0. Write 1, then pin 3 always generate logic high
Bit 2: FAN 2 Input Control. Set to 1, pin 3 acts as FAN clock input, which is default value. Set to 0,
Bit 1: FAN 1 output value if FANINC1 sets to 0. Write 1, then pin 2 always generate logic high
Bit 0: FAN 1 Input Control. Set to 1, pin 2 acts as FAN clock input, which is default value. Set to 0,
exceed the limit value, the pin (Open Drain) of BEEP will drives 300Hz and 600Hz frequency
signal. Write 1, the frequency will be disable. Default 0. After power on, the system should set
1 to this bit to 1 in order to disable BEEP.
This bit default 0.
signal. Write 0, pin 4 always generates logic low signal. This bit default 0.
this pin 4 acts as FAN control signal and the output value of FAN control is set by this register
bit 5. This output pin can connect to power PMOS gate to control FAN ON/OFF.
signal. Write 0, pin 3 always generates logic low signal. This bit default 0.
this pin 3 acts as FAN control signal and the output value of FAN control is set by this register
bit 3. This output pin can connect to power NMOS gate to control FAN ON/OFF.
signal. Write 0, pin 2 always generates logic low signal. This bit default 0.
this pin 2 acts as FAN control signal and the output value of FAN control is set by this register
bit 1. This output pin can connect to power PMOS gate to control FAN ON/OFF.
7
6
4Dh
<7:0> 0001,0101. Reset by MR.
Read/Write
8 bits
5
4
3
2
- 32 -
1
0
FANINC1
FANOPV1
FANINC2
FANOPV2
FANINC3
FANOPV3
GPOSEL
DIS_ABN
Publication Release Date: April 1999
W83783S
Preliminary
Revision 0.55

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