se98pw NXP Semiconductors, se98pw Datasheet - Page 5

no-image

se98pw

Manufacturer Part Number
se98pw
Description
Se98 So-dimm Smbus/i2c-bus Temperature Sensor
Manufacturer
NXP Semiconductors
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
se98pw,118
Manufacturer:
AVNET
Quantity:
10 000
NXP Semiconductors
7. Functional description
SE98_2
Product data sheet
7.1 Serial bus interface
7.2 Slave address
7.3 EVENT output
The SE98 uses the 2-wire serial bus (I
controller. The serial bus consists of a clock (SCL) and data (SDA) signals. The device
can operate on either the I
mode is defined to have bus speeds from 0 Hz to 100 kHz, I
to 400 kHz, and the SMBus is from 10 kHz to 100 kHz. The host or bus master generates
the SCL signal, and the SE98 uses the SCL signal to receive or send data on the SDA
line. Data transfer is serial, bidirectional, and is one bit at a time with the Most Significant
Bit (MSB) transferred first, and a complete I
open-drain, pull-up resistors must be installed on these pins.
The SE98 uses a 4-bit fixed and 3-bit programmable (A0, A1 and A2) 7-bit slave address
that allows a total of eight devices to co-exist on the same bus. The input of each pin is
sampled at the start of each I
address is 0011.
The EVENT pin is an open-drain output whose function can be programmed as an
interrupt, comparator, or critical alarm mode. When the device operates in Interrupt mode,
and the temperature reaches a critical temperature, the device switches to the comparator
mode automatically and asserts the EVENT pin. When the temperature drops below
critical temperature, the device reverts back to either interrupt or comparator mode, as
programmed in the Configuration register. The interrupt latch can be cleared by writing a
‘1’ to the ‘clear EVENT’ bit in the Configuration register or by performing the SMBus Alert
Response Address (ARA).
In comparator mode, the EVENT pin remains asserted until the temperature falls below
the value programmed in the Upper Boundary Alarm Trip register or rises above the value
programmed in the Lower Boundary Alarm Trip register, or until the range of these alarm
registers are reprogrammed and the temperature falls inside the alarm limits.
depicts the EVENT output for all the three modes. All event thresholds use hysteresis as
programmed in the Configuration register.
Fig 4. Slave address
Rev. 02 — 7 January 2008
2
C-bus Standard/Fast mode or SMBus. The I
2
MSB
C-bus/SMBus access. The temperature sensor’s fixed
0
0
fixed
slave address
2
1
C-bus/SMBus) to communicate with a host
SO-DIMM SMBus/I
1
2
C-bus data is 1 byte. Since SCL and SDA are
A2
selectable
hardware
A1
LSB
002aab304
A0
R/W
X
2
2
C-bus Fast mode from 0 Hz
C-bus temperature sensor
© NXP B.V. 2008. All rights reserved.
2
C-bus Standard
Figure 5
SE98
5 of 32

Related parts for se98pw