l99dz80ep STMicroelectronics, l99dz80ep Datasheet - Page 49

• Manufacturer Part Number: l99dz80ep
• Description: Door Actuator Driver
• Manufacturer: STMicroelectronics

L99DZ80EP
5
Table 32.
Name
Reset
Bit
GL_ER
SPI - control and status registers
Global status byte
GL_ER:
CO_ER:
C_RESET:
TSD:
TW:
UOV_OC_DS: Logical OR of the filtered undervoltage/overvoltage, chargepump-low,
OL:
NR:
7
0
CO_ER
6
0
Global Error Flag.
Failures of bits 6 to 0 are always linked to the Global Error Flag. This flag is
set, if at least one of these bits indicates a failure. It is reflected via the DO
pin while CSN is held low and no SPI clock signal is applied. This operation
does not cause the Communication Error bit in the <Global Status> to be
set. The signal TW bit3 and OL bit1can be masked.
Communication Error.
If the number of clock pulses during the previous frame is not 24, the frame
is ignored and this bit is set.
Chip RESET.
If a stuck at ‘1’ on input DI during any SPI frame occurs, or if a Power On
Reset (VCC monitor) occurs. C_RESET is reset (‘1’) with any SPI command.
When C_RESET is active (‘0’), the gate drivers are switched off (resistive
path to source). After a startup of the circuit C_RESET is active due to the
power-up reset pulse. Therefore, the gate drivers are switched off. They can
only be activated after the C_RESET has been reset by an SPI command.
Thermal shutdown.
All gate drivers and the charge pump are switched off (resistive path to
source). The TSD bit has to be cleared through a read and clear command
to reactivate the gate drivers and the chargepump.
Thermal Warning.
This bit can be masked using the configuration register.
overcurrent of the power outputs and the H-bridge drain-source monitor
signals.
Open-load.
Logical OR of the filtered output driver open-load signals. This bit can be
masked using the configuration register.
Not Ready.
After switching the device from standby mode to active mode an internal
timer is started to allow the chargepump to settle before the outputs can be
activated. This bit is cleared automatically after the startup time.
C_RESET
5
1
Doc ID 18260 Rev 4
TSD
4
0
TW
3
0
SPI - control and status registers
UOV_OC_DS
2
0
OL
1
0
NR
0
0
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