uaa2068g NXP Semiconductors, uaa2068g Datasheet - Page 9

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uaa2068g

Manufacturer Part Number
uaa2068g
Description
Transmit Chain And Synthesizer With Integrated Vco For Dect
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 2 Bit allocation; notes 1 and 2
Notes
1. X = don’t care.
2. In normal operation, only 8 bits are programmed into the register.
3. For normal operation, b15 to b8 do not need to be programmed.
4. The validation bit (b7) must be programmed with zero for normal operation.
5. Bit b6 is the MSB of the main divider coefficient.
6. The main divider ratio is equal to 1024 plus the programmed value (see Table 3).
Table 3 Main divider programming
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. Pins short-circuited internally must be short-circuited externally.
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.
1998 Nov 19
V
V
V
P
T
T
T
FIRST
b15
GND
stg
amb
j
CC
CC(CP)
CC(CP)
tot
Transmit chain and synthesizer with
integrated VCO for DECT
IN
X
b6
1
1
(3)
SYMBOL
b14
V
X
CC
(3)
b5
0
0
b13
X
supply voltage
charge-pump supply voltage
difference in voltage between V
difference in ground supply voltage applied
between all ground pins
total power dissipation
storage temperature
operating ambient temperature
junction temperature
(3)
b4
Binary equivalent of n
0
0
b12
X
(3)
b11
b3
0
1
X
(3)
PARAMETER
b10
X
b2
REGISTER BIT ALLOCATION
0
0
(3)
b9
X
(3)
CC(CP)
DATA FIELD
b1
0
1
b8
X
and V
9
(3)
b0
1
0
b7
CC
0
(4)
note 1
MAIN DIVIDER
b6
CONDITIONS
(5)
1024 + n
RATIO
1089
1098
b5
main divider programming
b4
0.3
0.3
0.3
55
10
MIN.
b3
FREQUENCY (MHz)
1.728 (1024 + n)
SYNTHESIZED
Product specification
UAA2068G
1881.792
1897.344
b2
+5.5
+5.5
+5.5
275
+125
+60
150
0.3
MAX.
b1
(6)
V
V
V
V
mW
C
C
C
UNIT
LAST
b0
IN

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