W83194R-17/-17A Winbond Electronics Corp America, W83194R-17/-17A Datasheet - Page 17

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W83194R-17/-17A

Manufacturer Part Number
W83194R-17/-17A
Description
100MHz Sis 5595, 5598 Clock Gen.
Manufacturer
Winbond Electronics Corp America
Datasheet
11.0 OPERATION OF DUAL FUCTION PINS
Pins 2, 7, 8, 25, and 26 are dual function pins and are used for selecting different functions in this
device (see Pin description). During power up, these pins are in input mode (see Fig1), therefore,
and are considered input select pins. When Vdd reaches 2.5V, the logic level that is present on
these pins are latched into their appropriate internal registers.
properly latched, these pins will change into output pins and will be pulled low by default. At the end
of the power up timer (within 3 ms) outputs starts to toggle at the specified frequency.
Each of these pins is a large pull-up resistor (250 kΩ @3.3V) inside. The default state will be logic 1,
but the internal pull-up resistor may be too large when long traces or heavy load appear on these dual
function pins. Under these conditions, an external 10 kΩ resistor is recommended to be connected to
Vdd if logic 1 is expected. Otherwise, the 10 kΩ resistor is connected to ground if logic 0 is desired.
The 10 kΩ resistor should be place before the serious terminating resistor. Note that this logic will
only be latched at initial power on.
If optional EMI reducing capacitor is needed, they should be placed as close to the series terminating
resistor as possible and after the series-terminating resistor.
ranging from 4.7pF to 22pF.
#2 REF0/CPU3.3#_2.5
#7 PCICLK_F/FS1
#8 PCICLK0/FS2
#25 24/MODE
#26 48/FS0
All other clocks
- 17 -
Output
tri-state
Output
tri-state
Input
2.5V
Output
pull-low
Output
pull-low
Within 3ms
Output
This capacitor has typical values
Publication Release Date: Sep. 1998
Once the correct information is
Vdd
Revision 1.0

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