stm6717tz STMicroelectronics, stm6717tz Datasheet - Page 21

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stm6717tz

Manufacturer Part Number
stm6717tz
Description
Dual/triple Ultra-low Voltage Supervisors With Push-button Reset With Delay Option
Manufacturer
STMicroelectronics
Datasheet

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Table 6.
1. Valid for ambient operating temperature: T
2. Input leakage for the MRC pin is not tested.
3. Guaranteed by design.
4. The leakage current measured on the RST pin is tested with the reset de-asserted (output high impedance).
5. Selecting the appropriate external capacitor (preferably less than 100pF) allows systems designers to vary the minimum
Table 7.
1. At 25°C (typical)
Manual (push-button) reset input
t
t
Sym
MLMH
MLRL
V
V
delay from 6µs (MRC pin left open) or more (see
IH
IL
V
1.6V
2.0V
3.0V
4.0V
5.0V
CC1
native
Alter-
t
t
MRD
MR
DC and AC characteristics (continued)
t
MLMH
MR minimum pulse width
MR minimum pulse width
MR to RST output delay
100pF
120µs
122µs
125µs
128µs
130µs
minimum pulse width
MR pull-up resistance
(STM6717/18/19/20)
(STM6777/78/79/80)
(STM6717/18/19/20)
MR glitch immunity
MR input voltage
Description
120ms
122ms
125ms
129ms
130ms
0.1µF
A
= –40 to 85°C; V
Table
7).
2.2µF
MRC connected via
2.6s
2.7s
2.7s
2.8s
2.8s
capacitor to V
Test condition
Capacitor value
CC1
= 0.8 to 5.5V and V
SS
3.3µF
(1)
(5)
4.0s
4.0s
4.1s
4.2s
4.3s
(1)
CC2
= 0.8 to 3.6V (except where noted).
0.7V
Min
25
1
4.7µF
CC1
5.6s
5.8s
5.9s
6.0s
6.1s
Typ
200
100
50
6
0.3V
Max
80
C1
6.8µF
8.2s
8.3s
8.5s
8.7s
8.8s
C
21/29
Unit
µs
µs
ns
ns
V
V

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