tmp86c847iug TOSHIBA Semiconductor CORPORATION, tmp86c847iug Datasheet - Page 148

• Manufacturer Part Number: tmp86c847iug
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.3 Function
13. Key-on Wakeup (KWU)
a) STOP
check all STOP2 to STOP5 pins "H" that is enabled by STOPCR before the STOP mode is started (Note2,3).
STOP pin
Also, each level of the STOP2 to STOP5 pins can be confirmed by reading corresponding I/O port data register,
Note 1: When the STOP mode released by the edge release mode (SYSCR1<RELM> = “0”), inhibit input from STOP2 to
Note 2: When the
Note 3: The input circuit of Key-on Wakeup input and Port input is separated, so each input voltage threshold value is dif-
Note 4:
Note 5: In STOP mode, Key-on Wakeup pin which is enabled as input mode (for releasing STOP mode) by Key-on
Note 6: When the STOP mode is released by STOP2 to STOP5 pins, the level of
STOP5 pins by Key-on Wakeup Control Register (STOPCR) or must be set "H" level into STOP2 to STOP5 pins
that are available input during STOP mode.
instruction which starts STOP mode will not place in STOP mode but instead will immediately start the release
sequence (Warm up).
ferent. Therefore, a value comes from port input before STOP mode start may be different from a value which is
detected by Key-on Wakeup input (Figure 13-2).
STOP
STOP5 pins,
Wakeup Control Register (STOPCR) may generate the penetration current, so the said pin must be disabled AD
conversion input (analog voltage input).
13-3).
STOP mode
pin doesn’t have the control register such as STOPCR, so when STOP mode is released by STOP2 to
Figure 13-3 Priority of
STOP
Table 13-1 Release level (edge) of STOP mode
STOP
Figure 13-2 Key-on Wakeup Input and Port Input
Pin name
pin input is high or STOP2 to STOP5 pins input which is enabled by STOPCR is low, executing an
STOP2
STOP3
STOP4
STOP5
STOP
pin also should be used as STOP mode release function.
Key-on wakeup
Port input
Release
STOP mode
input
SYSCR1<RELM>="1"
STOP
"H" level
"L" level
"L" level
"L" level
"L" level
(Note2)
Page 140
b)
STOP pin "L"
STOP2 pin
pin and STOP2 to STOP5 pins
In case of STOP2 to STOP5
Release level (edge)
SYSCR1<RELM>="0"
External pin
STOP mode
Don’t use (Note1)
Don’t use (Note1)
Don’t use (Note1)
Don’t use (Note1)
Rising edge
STOP
pin should hold "L" level (Figure
Release
STOP mode
TMP86C847IUG