l9733 STMicroelectronics, l9733 Datasheet - Page 23

• Manufacturer Part Number: l9733
• Description: Octal Self Configuring Low/high Side Driver
• Manufacturer: STMicroelectronics

L9733
6
6.1
6.2
6.3
6.4
Note:
Other L9733 features
Charge pump usage
In order to provide low Rdson values when connected in a high side configuration, a charge
pump to drive the internal gate voltage(s) above Vbat is implemented. The charge pump
used on the L9733 doesn't need external capacitor. The L9733 uses a common charge
pump and oscillator for all the 8 configurable output channels. The charge pump uses the
Vbat supply connected directly to the Vb pin. The normal range of the Vbat voltage is 10 to
18V18V. However, the L9733 is functional with Vbat voltages as low as 4.5V DC with
eventually a degradation of Rdson.
The frequency range of this charge pump is from 3.6 to 7.6 MHz. The frequency is above
1.8MHz in order to be above the AM radio band and below 8.0MHz so that harmonics do not
get within the FM radio band.
Waveshaping
Both the turn on and the turn off slew rates on all outputs (OUT1-8) are limited to between
10µs and 100µs for both rise and fall times (10 to 90%, and vice versa), to reduce conducted
EMC energy in the vehicle's wiring harness. The characteristics of the turn-on and turn-off
voltage is linear, with no discontinuities, during the output driver state transition.
POR register initialization
When the L9733 wakes up, the Vdd supply to the L9733 is allowed from 0 to 5 VDC in 0.3 to
3ms. The L9733 has a POR circuit, which monitors the Vdd voltage. When the Vdd voltage
reaches an internal threshold, and remains above this trip level for at least 5 to 20
Command and Fault registers are "cleared". Before Vdd reaches this trip level, none of the
eight outputs are allowed to momentarily glitch on.
Thermal shutdown
Each of the eight outputs has independent thermal protection circuitry that disables each
output driver once the local N-Channel MOSFET's device temperature reaches between
+151 and +200°C. A filter is present to validate the thermal fault (5µs to 20µs). There is a 5
to 15°C hysteresis between the enable and disable temperature levels. The faulted channel
will periodically turn off and on until the fault condition is cleared, the ambient temperature is
decreased sufficiently or the output is commanded off. If a thermal shutdown, of one or
more output drivers, is active during the falling edge of the chip select (CS) signal all the bits
of the Fault Register are "setted" to "1" (thermal shutdown is not latched and could be read
only in the moment it is present). The thermal fault is cleared on the rising edge of Chip
Select if a valid DI byte was received.
Due to the design of the L9733 each output's thermal limit "may not" be truly independent to
the extent that if one output is shorted, it may impact the operation of other outputs (due to
lateral heating in the die).
Other L9733 features
μ
s, the
23/33