lm27241 National Semiconductor Corporation, lm27241 Datasheet - Page 14

• Manufacturer Part Number: lm27241
• Description: Synchronous Buck Regulator Controller For Mobile Systems
• Manufacturer: National Semiconductor Corporation

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Operation Descriptions
CH1: PGOOD, CH2: VIN, CH3: LDRV, CH4: Vo
Output 1V
660µF
CH1: PGOOD, CH2: VIN, CH3: LDRV, CH4: Vo
Output 1V
660µF
The recovery procedure from a VIN Power-off is the same as
for any fault condition.
VDD POWER-OFF (UVLO)
Whenever VDD starts to fall, and drops below about 3.5V,
LDRV goes high immediately, ‘Power Not Good’ is signaled
and in effect a fault condition (in this case an Under-voltage
lockout) is asserted. Recovery from a fault is discussed in
the "Fault and Recovery" section.
FIGURE 8. VIN Removal in FPWM Mode
@
@
FIGURE 9. VIN Removal in SKIP Mode
0.02A, VIN = 9.75V, FPWM, L = 10µH, f = 300kHz, C
0.02A, VIN = 9.75V, SKIP, L = 10µH, f = 300kHz, C
(Continued)
OUT
OUT
20120115
20120116
=
=
14
OVER-VOLTAGE PROTECTION
If the voltage on the FB pin exceeds 113% of 0.60V, a Power
Not Good signal is asserted. If the voltage on the FB pin
exceeds 130% of 0.60V, a fault condition is declared, and the
LDRV goes high. If the fault persists, the low-side FET will
stay on and the high-side FET will not turn back on until the
FB pin falls within the power good window, and the Enable
pin is toggled.
CURRENT LIMIT AND PROTECTION
Output current limiting is achieved by sensing the negative
Vds drop across the low-side FET when the FET is turned
ON. The Current Limit Comparator (see Block Diagram)
monitors the voltage at the ILIM pin with 62µA (typical value)
of current being sourced from the pin. The 62µA source flows
through an external resistor connected between ILIM and
the drain of the low-side FET. The voltage drop across the
ILIM resistor is compared with the drop across the low-side
FET and the current limit comparator trips when the two are
of the same magnitude. This determines the threshold of
current limiting. For example, if excessive inductor current
causes the voltage across the low-side FET to exceed the
voltage drop across the ILIM resistor, the ILIM pin will go
negative (with respect to ground) and trip the comparator.
The comparator then sets a latch that prevents the high-side
FET from turning ON during the next PWM clock cycle. The
high-side FET will resume switching only if the current limit
comparator was not tripped in the previous switching cycle.
Additionally, the Soft-start capacitor at the SS pin is dis-
charged with a 115µA current source when an overcurrent
event is in progress. The purpose of discharging the Soft-
start capacitor during an overcurrent event is to eventually
allow the voltage on the SS pin to fall low enough to cause
additional duty cycle limiting.
R
LIMIT
= (R
DS_ON
x I
LIMIT
/ 62 µA)