tb62217afg TOSHIBA Semiconductor CORPORATION, tb62217afg Datasheet - Page 5

• Manufacturer Part Number: tb62217afg
• Description: Pwm Drive Stepping Motor Driver / Brush Dc Motor Driver Selectable, Dc-dc Converter And Reset Function Ic
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Pin Descriptions
SLEEP
Pin Name Assignment Table
17
18
19
20
21
22
23
30
25
26
27
28
29
30
31
-
#
#
#
#
"
0 6 5
0 6 5
)
"
"
3 4
3 4
"
4 - & & 1
0 6 5
(1) Pin description (SETUP mode, that is, initial setup or extended setup mode)
(2) Pin description (dual axis stepping motor mode)
(3) Pin description (single axis stepping motor and single axis DC (L) mode)
(4) Pin description (single axis stepping motor and dual axis DC (S) mode)
(5) Pin description (dual axis DC (S) and single axis DC (L) mode)
(6) Pin description (dual axis DC (L) mode)
(7) Pin description (quadruple axis DC (S) mode)
% ( / %
0 6 5
3 4
3 4
)
. ( / %
. ( / %
4 - & & 1
)
. ( / %
0 6 5 "
. ( / %
(VREF CD)
4 - & & 1
/ $
/ $
(VREF AB)
)
4 & 5 6 1
3 4 #
3 4 #
OSC_D
4 - & & 1
)
(ODC)
VDIN1
VDIN2
. 0 % &
(ODB)
(ODA)
"
"
(FBC)
(FBB)
(FBA)
0 6 5 "
3 4
3 4
4 - & & 1
CC
NC
NC
VM
Low supports a write mode for the initial setup or extended setup mode data.
4 - & & 1
% ( / %
0 6 5 "
4


. ( / %
. ( / %
3 4 #
3 4 #
. ( / %
. ( / %
0 6 5 "
"
"
3 4
3 4
/ $
/ $
0 6 5 "
0 6 5 #
0 6 5 #
% ( / %
0 6 5 "
3 4 #
3 4 #
VREF CD
(initial setup mode)
VREF AB
% V B M
OSC_D
4 5 & 1
"
"
- " #
VDIN1
VDIN2
. ( / %
. ( / %
3 4
3 4
0 6 5
ODC
ODB
ODA
FBC
FBB
FBA
. ( / %
. ( / %
CC
NC
NC
VM
- " #
0 6 5
0 6 5 - " #
% ( / %


3 4 #
3 4 #
/ $
/ $
"
"
0 6 5 - " #
3 4
3 4
0 6 5 4 "
. ( / %
. ( / %
-
. ( / %
. ( / %
0 6 5 4 "
3 4 #
3 4 #
% ( / %
VREF LCD
% $
VREF AB
"
"
OSC_D
4 5 & 1
3 4
3 4
VDIN1
VDIN2
ODC
ODB
ODA
FBC
FBB
FBA
CC
NC
NC
VM
/ $
/ $
. ( / %
. ( / %


3 4 #
3 4 #
. ( / %
. ( / %
% ( / %
"
"
3 4
3 4
4
% $
M
% V B
VREF SCD
/ $
/ $
. ( / %
. ( / %
% ( / %
VREF AB
OSC_D
4 5 & 1
0
0
. ( / %
. ( / %
VDIN1
VDIN2
ODC
ODB
ODA
FBC
FBB
FBA
CC
NC
NC
VM


4
5
% $
6
6
. ( / %
. ( / %
. ( / %
. ( / %
/ $
/ $
M
% V B
-
VREF SCD
VREF LAB
% $
OSC_D
0
0
VDIN1
VDIN2
5
5
ODC
ODB
ODA
FBC
FBB
FBA
CC
NC
NC
VM


/ $
/ $
6
6
4
- D I
% $
% $
L
0
0
M
3 F N B S
% V B
VREF LCD
VREF LAB
OSC_D
VDIN1
VDIN2
5
5
ODC
ODB
ODA
#
#
FBC
FBB
FBA
CC
NC
NC
VM
6
6


0
0
5
5
)
VREF SCD
VREF SAB
- & & 1
OSC_D
6
6
VDIN1
VDIN2
ODC
ODB
ODA
#
#
FBC
FBB
FBA
CC
NC
NC
VM
TB62217AFG


5
5
-
-
2004-11-12
0
0
"
"
-
-
6
6
#
#
"
"
5
5
#
#
4
4
#
#