tb62217afg TOSHIBA Semiconductor CORPORATION, tb62217afg Datasheet - Page 4

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tb62217afg

Manufacturer Part Number
tb62217afg
Description
Pwm Drive Stepping Motor Driver / Brush Dc Motor Driver Selectable, Dc-dc Converter And Reset Function Ic
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Cautions on connection to the IC pins
Note2
Note3
Note11
Note1
Note4
Note5
Note6
Note 8
Note 9
Note 10
and normal protection mask time” and “ORT output time” to 1/1024 of the respective ratings so as to make the
inspection easier.
The TB62217FG has a test mode function for inspection at the factory. The test mode reduces the “initial
To maintain normal operation, therefore, be sure to connect pin 32 to a ground so that it will not be used.
Conditions to use the test mode
Note7: TEST pin
not used.
Connect any unused Vref pins (28pin,29pin) to GND.
Unused DATA, CLOCK, and STROBE input pins are pulled down internally, so connect them to GND.
Connect all NC pins (pins left unused) to the lowest potential level (usually to GND).
Connect any unused RS pins to VM.
Connect the feedback pins (FBA, FBB, and FBC) to GND if the corresponding DC-DC converter is
Always connect the TEST pin to the lowest potential level (usually to GND).
Please ensure that noise is not introduced into the external circuit
Input level
If the IC is inserted in an incorrect orientation, it will be damaged because a high voltage is applied
The IC has no on-chip over voltage protection circuit. Avoid applying a voltage higher than any
to low-voltage blocks. To avoid such damage, always confirm the position of pin 1 and the position
and dimensions of each lead when installing the IC.
Once set up, since the IC is not affected by a logical input from a “Don’t care” pin even if a voltage is
for heat release so as to ensure stable operation and efficient heat release.
applied to the pin, as long as the applied voltage is not higher than its rating, no problem (such as
a malfunction) will occur.
rated voltage (such as maximum ratings) to the IC.
Solder the heat sink provided on the bottom surface of the IC to a ground-level pattern arranged
High
Low
standard operation
TEST Mode
32
4
32 pin: TEST
100k
TB62217AFG
2004-11-12

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