tza3030 NXP Semiconductors, tza3030 Datasheet - Page 7

• Manufacturer Part Number: tza3030
• Description: Sdh/sonet Stm1/oc3 Optical Receiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FUNCTIONAL DESCRIPTION
The TZA3030 contains five functional blocks:
Preamplifier
The preamplifier provides low-noise amplification of the
current generated by a photodiode connected to
pin IPhoto.
A differential amplifier converts the output of the
preamplifier to a differential voltage. An AGC loop
increases the dynamic range of the receiver by reducing
the feedback resistance of the preamplifier. The AGC loop
hold capacitor is integrated on-chip, so an external
capacitor is not needed for AGC. The AGC voltage can be
monitored at pin AGC. This pin can be left unconnected for
normal operation. It can also be used to force an external
AGC voltage. If pin AGC is connected to V
AGC loop is disabled and the receiver gain is at a
maximum. In this case, the maximum input current is
approximately 10 A.
Low-pass filter
A low-pass filter controls the bandwidth of the receiver,
which can be varied between 90 and 150 MHz.
The bandwidth is set to 120 MHz by default. It can be
decreased by connecting a resistor between pin BWC and
pin V
pin BWC and AGND.
1998 Aug 24
Preamplifier input stage
Low-pass filter
Limiting amplifier stage
Offset compensation loop
Loss of signal detection unit.
SDH/SONET STM1/OC3 optical receiver
ref
or increased by connecting a resistor between
CCA
, the internal
7
Limiting amplifier
A limiting amplifier boosts the signal up to PECL levels.
The output can be either CML or PECL compatible,
selected by means of pin OUTSEL. When OUTSEL is
HIGH, the CML data outputs are active and the PECL data
outputs are disabled. If OUTSEL is left unconnected, it is
pulled LOW and the PECL data outputs are active while
the CML data outputs are disabled.
The logic level symbol definitions for CML and PECL are
shown in Fig.4.
The CML and PECL output circuits are given in Fig.5.
Offset compensation loop
A control loop connected between the limiting amplifier
output and the differential amplifier input cancels the
DC offset. The loop bandwidth is fixed internally at 30 kHz.
Loss Of Signal (LOS) detection
The LOS section detects an input signal level below a fixed
threshold. The threshold is determined by the current
through pin LOSTH. If this current is increased, the
threshold level will rise. An external resistor connected
between pin LOSTH and V
can be forced into pin LOSTH. The default value for the
external resistor is 400 k . In this case, the current
through pin LOSTH will be approximately 3.75 A since
the voltage at pin LOSTH is regulated at 1.5 V below the
supply voltage. This threshold corresponds to an input
current of 208 nA. The ratio of LOSTH current to input
current is thus approximately 18 : 1. When the input signal
level falls below this threshold, the LOS
(PECL compatible) and LOSTTL (TTL compatible)
outputs go HIGH. The hysteresis is fixed internally at 3 dB.
Response time is typically less than 20 s.
CCA
can be used, or a current
Objective specification
TZA3030