lm5039mhx National Semiconductor Corporation, lm5039mhx Datasheet - Page 20

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lm5039mhx

Manufacturer Part Number
lm5039mhx
Description
Half-bridge Pwm Controller With Average Current Limit
Manufacturer
National Semiconductor Corporation
Datasheet

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AVERAGE CURRENT LIMIT
The average current control circuitry is activated by connect-
ing an appropriate capacitor from the ACL pin to AGND. In an
overload condition, the current sourced by the ACL capacitor
pulls down the input of the PWM comparator which is normally
controlled through the COMP pin to terminate the PWM cycle.
Once the ACL pin voltage reaches 1V, the PWM cycle is con-
trolled by the average current limiter. The ACL capacitor
should be selected for minimal ripple. Ripple on the ACL ca-
pacitor will result in a ripple at the center-point of the capacitor
divider. It should be noted that a larger value of the ACL ca-
pacitor can slowdown the time it takes for the average current
limit circuitry to take control and could possibly result in the
center-point of the half-bridge capacitor divider drifting during
cycle-by-cycle limiting. The magnitude of the drift of the cen-
ter-point of the half-bridge capacitor once the converter hits
the current limit depends upon the value of the half-bridge
capacitors, the primary current, and the pulse width. For the
LM5039 evaluation board, ACL capacitor values ranging from
0.047uF to 0.47uF balanced the half-bridge center point in
both soft-short and hard-short conditions. When configuring
the LM5039 with hiccup mode restart, the ACL and RES ca-
pacitors should be configured such that the time required for
the RES pin to reach 2.5V is greater than the time required
for average current limit circuitry to take control.
HICCUP MODE CURRENT LIMIT RESTART (RES)
The basic operation of the hiccup mode current limit restart is
described in the functional description. The delay time to
restart is programmed with the selection of the RES pin ca-
pacitor C
In the case of continuous peak cycle-by-cycle average current
limit detection at the CS pin, the time required for C
reach the 2.5V hiccup mode threshold is:
RES
as illustrated in
Figure
12.
FIGURE 11. Remote Disable and Control
RES
to
20
For example, if C
1.14 ms.
The cool down time, t2 is set by the soft-start capacitor (C
and the internal 1 µA SS current source, and is equal to:
If C
The soft-start time t3 is set by the internal 110 µA current
source, and is equal to:
If C
The time t2 provides a periodic cool-down time for the power
converter in the event of a sustained overload or short circuit.
This off time results in lower average input current and lower
power dissipation within the power components. It is recom-
mended that the ratio of t2 / (t1 + t3) be in the range of 5 to
10 to take advantage of this feature.
If the application requires no delay from the first detection of
a current limit condition to the onset of the hiccup mode (t1 =
0), the RES pin can be left open (no external capacitor). If it
is desired to disable the hiccup mode entirely, the RES pin
should be connected to ground (AGND).
SS
SS
= 0.01 µF t2 is
= 0.01 µF t3 is
RES
= 0.01 µF the time t1 is approximately
10 ms.
363 µs.
30100536
SS
)

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