lm5039mhx National Semiconductor Corporation, lm5039mhx Datasheet - Page 11

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lm5039mhx

Manufacturer Part Number
lm5039mhx
Description
Half-bridge Pwm Controller With Average Current Limit
Manufacturer
National Semiconductor Corporation
Datasheet

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Functional Description
The LM5039 PWM controller contains all of the features nec-
essary to implement half-bridge voltage-mode controlled
power converters. The LM5039 provides two gate driver out-
puts to directly drive the primary side power MOSFETs and
two signal level outputs to control secondary synchronous
rectifiers through an isolation interface. Secondary side
drivers, such as the LM5110, are typically used to provide the
necessary gate drive current to control the sync MOSFETs.
Synchronous rectification allows higher conversion efficiency
and greater power density than conventional PN or Schottky
rectifier techniques. The LM5039 can be configured to oper-
ate with bias voltages ranging from 8V to 105V. Additional
features include line under-voltage lockout, peak cycle-by-
cycle current limit, average current limit to balance half-bridge
capacitor voltage, voltage feed-forward compensation, hic-
cup mode fault protection with adjustable delays, soft-start, a
2MHz capable oscillator with synchronization capability, pre-
cision reference, thermal shutdown, and programmable
volt•second clamping. These features simplify the design of
voltage-mode half-bridge DC-DC power converters. The
Functional Block Diagram is shown in
High-Voltage Start-Up Regulator
The LM5039 contains an internal high voltage start-up regu-
lator that allows the input pin (VIN) to be connected directly
to a nominal 48 VDC input voltage. The regulator input can
withstand transients up to 105V. The regulator output at VCC
(7.6V) is internally current limited to 65mA typical. When the
UVLO pin potential is greater than 0.4V, the VCC regulator is
enabled to charge an external capacitor connected to the
VCC pin. The VCC regulator provides power to the voltage
reference (REF) and the output drivers (LO, SR1 and SR2).
When the voltage on the VCC pin exceeds the UVLO thresh-
old, the internal voltage reference (REF) reaches its regula-
tion setpoint of 5V and the UVLO voltage is greater than
1.25V, the controller outputs are enabled. The value of the
VCC capacitor depends on the total system design, and its
start-up characteristics. The recommended range of values
for the VCC capacitor is 0.1 µF to 100 µF.
The VCC under-voltage comparator threshold is lowered to
6.2V (typical) after VCC reaches the regulation set-point. If
VCC falls below this value, the outputs are disabled, and the
soft-start capacitor is discharged. If VCC increases above
7.6V, the outputs will be enabled and a soft-start sequence
will commence.
The internal power dissipation of the LM5039 can be reduced
by powering VCC from an external supply. In typical applica-
tions, an auxiliary transformer winding is connected through
Figure
1.
11
a diode to the VCC pin. This winding must raise the VCC volt-
age above 8.3V to shut off the internal start-up regulator.
Powering VCC from an auxiliary winding improves efficiency
while reducing the controller’s power dissipation. The under-
voltage comparator circuit will still function in this mode, re-
quiring that VCC never falls below 6.2V during the start-up
sequence.
During a fault mode, when the converter auxiliary winding is
inactive, external current drawn on the VCC line should be
limited such that the power dissipated in the start-up regulator
does not exceed the maximum power dissipation of the IC
package.
An external DC bias voltage can be used instead of the inter-
nal regulator by connecting the external bias voltage to both
the VCC and the VIN pins. The external bias must be greater
than 8.3V to exceed the VCC UVLO threshold and less than
the VCC maximum operating voltage rating (15V).
Line Under-Voltage Detector
The LM5039 contains a dual level Under-Voltage Lockout
(UVLO) circuit. When the UVLO pin voltage is below 0.4V, the
controller is in a low current shutdown mode. When the UVLO
pin voltage is greater than 0.4V but less than 1.25V, the con-
troller is in standby mode. In standby mode the VCC and REF
bias regulators are active while the controller outputs are dis-
abled. When the VCC and REF outputs exceed the VCC and
REF under-voltage thresholds and the UVLO pin voltage is
greater than 1.25V, the outputs are enabled and normal op-
eration begins. An external set-point voltage divider from VIN
to GND can be used to set the minimum operating voltage of
the converter. The divider must be designed such that the
voltage at the UVLO pin will be greater than 1.25V when VIN
enters the desired operating range. UVLO hysteresis is ac-
complished with an internal 23 µA current source that is
switched on or off into the impedance of the set-point divider.
When the UVLO threshold is exceeded, the current source is
activated to quickly raise the voltage at the UVLO pin. When
the UVLO pin voltage falls below the 1.25V threshold, the
current source is deactivated. The hysteresis of the 0.4V
shutdown comparator is internally fixed at 100 mV.
The UVLO pin can also be used to implement various remote
enable / disable functions. See the Soft Start section for more
details.
Reference
The REF pin is the output of a 5V linear regulator that can be
used to bias an opto-coupler transistor and external house-
keeping circuits. The regulator output is internally current
limited to 20mA (typical).
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