ncp5214 ON Semiconductor, ncp5214 Datasheet - Page 23

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ncp5214

Manufacturer Part Number
ncp5214
Description
2-in-1 Notebook Ddr Power Controller
Manufacturer
ON Semiconductor
Datasheet

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voltage feedforward function, the ramp amplitude is a
function of V
components:
where the DCR of the inductor can be neglected if the DCR is small.
filter phase and compensation phase:
crossing with −20 dB/decade slope and a phase margin of
45° or greater. The compensation components values may
require some adjustment to meet these requirements.
Besides, the compensation gain should be checked with the
error amplifier open loop gain to make sure that it is
bounded by the error amplifier open loop gain.
compensation network components values may need to be
further fine tuned after actual system testing and analysis.
Feedback Resistor Divider
by the feedback resistor divider formed by R
the value of R
compensation components, the value of R
by:
Close loop system bandwidth can be calculated by:
Since the ramp amplitude of the PWM modulator has a
Below are some guidelines for setting the compensation
The phase of the output filter can be calculated by:
The phase of the Type III compensation network can be calculated by:
The close loop phase can be calculated by summing the
Then the close loop phase margin can be estimated by:
It should be checked that closed loop gain has a 0 dB gain
The poles and zeros locations and hence the
The output voltage of the buck regulator can be adjusted
Phase (CloseLoop) + Phase (Filter) ) Phase (TypeIII)
Phase (Margin) + Phase (CloseLoop) * (*180°)
1. Set a value for R
2. Set a target for the close loop bandwidth which
3. Pick compensation DC gain (R
4. Place 1st zero at half filter double pole.
5. Place 1st pole at ESR zero.
6. Place 2nd zero at filter double pole.
7. Place 2nd pole at half the switching frequency.
should be less than 50% of the switching
frequency.
close loop bandwidth.
BW +
V RAMP + 1.25 V ) 0.045
IN
R 3
R 1
which can be determined by:
1
Phase (Filter) + − tan −1 (2pf
is selected when determining the
Phase (TypeIII) + −90° ) tan −1 (2pf
V RAMP
V IN
1
between 2.0 kW and 5.0 kW.
2p
(V IN −5.0 V)
) tan −1 (2pf
3
L
/R
1
2
1
can be obtained
) for desired
C OUT
1
and R
ESR
2
(eq. 28)
(eq. 29)
(eq. 37)
(eq. 38)
http://onsemi.com
. Once
(R 1 ) R 4 )
NCP5214
C OUT )− tan −1
R 3
23
compensation components values can be determined by the
equations below:
close loop gain asymptotic Bode plot can be drawn by the
calculated results to check the compensation gain and close
loop gain obtained. An example of asymptotic Bode plot is
shown in Figure 40.
the output voltage when it is necessary. The value of R
should not be changed since the compensation DC gain and
the 2
contributed by R
compensation, the close loop bandwidth and phase margin,
and the system stability will be affected. Besides, it is
recommended to use resistors with at least 1% tolerance for
R
Soft−Start of Buck Regulator
to prevent surge current from power supply and output
voltage overshoot during power up. When VDDQEN,
VCCA, and VOCDDQ rise above their respective upper
threshold voltages, the external soft−start capacitor C
will be charged up by a constant current source, I
the soft−start voltage (Vcss) rises above the SS_EN voltage
(X50 mV), the BGDDQ and TGDDQ will start switching
and VDDQ output will ramp up with VFBDDQ following
the soft−start voltage. When the soft−start voltage reaches
the SS_OK voltage (XVref + 50 mV), the soft−start of
R 3 +
1
C 2 )− tan −1 2pf
By using the above equations and guidelines, the
The modulator and filter gain, compensation gain, and
It is recommended to adjust the value of R
A VDDQ soft−start feature is incorporated in the device
C 3 )− tan −1 (2pf
and R
nd
zero break frequency of the compensation gain are
2p
2pf
2
.
R 4 +
2pf 2
BW
ESR ) DCR
C 2 +
p
1
C 1 +
C 3 +
. If the value of R
V RAMP
L
R 2 +
R 3
R 4
f SW
2
p
C OUT −1
ESR C OUT
C 1
C 1 ) C 2
V OUT −0.8
V IN
R 3 C 2
0.8
C 3 )
R 4
L
R 3
C 2
R 1
L
C OUT
1
R 1
C 2
R 1
C OUT
f SW
C OUT * 1
* 1
L
1
is changed, the
C OUT
2
to fine−tune
ss
(eq. 35)
(eq. 36)
. When
(eq. 30)
(eq. 31)
(eq. 32)
(eq. 33)
(eq. 34)
(eq. 39)
SS
1

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