ncp5306dw ON Semiconductor, ncp5306dw Datasheet - Page 22

• Manufacturer Part Number: ncp5306dw
• Description: Threephase Vrm 9.0 Buck Controller
• Manufacturer: ON Semiconductor

network (R
C
(and/or C
the V
27 and 28). Tune the R
“square−wave” at the V
time and minimal overshoot as shown in Figure 28.
8. Error Amplifier Tuning
current sense network has been optimized, the Error
Amplifier must be tuned. The gain of the Error Amplifier
should be adjusted to provide an acceptable transient
response by increasing or decreasing the Error Amplifier’s
feedback capacitor (C
bandwidth of the control loop will vary directly with the gain
of the error amplifier.
the COMP pin will slew too slowly and the output voltage
will overshoot as shown in Figure 29. On the other hand, if
C
COMP pin will slew very quickly and overshoot will occur.
Integrator “wind up” is the cause of the overshoot. In this
case, the output voltage will transition more slowly because
COMP spikes upward as shown in Figure 30. Too much loop
gain/bandwidth increases the risk of instability. In general,
one should use the lowest loop gain/bandwidth possible to
achieve acceptable transient response. This will insure good
stability. If C
quickly but not overshoot and the output voltage will
monotonically settle as shown in Figure 32.
transient response, the steady−state voltage ripple on the
COMP pin should be examined. When the converter is
V
CSx
AMP
Constant of the Current Sense Network Is Optimal:
For resistive current sensing, choose the current sense
This will provide an adequate starting point for R
After the steady−state (static) AVP has been set and the
If C
After the control loop is tuned to provide an acceptable
DRP
Figure 28. V
. After the converter is constructed, the value of R
DRP
AMP
is too small, the loop gain/bandwidth will be high, the
and V
CSx
signal during a step change in load current (Figures
is too large, the loop gain/bandwidth will be low,
CSx
OUT
) should be fine−tuned in the lab by observing
R CSx @ C CSx + Lo (R sense )
AMP
, C
DRP
Without Overshooting.
Respond to the Load Current Quickly
CSx
is optimal, the COMP pin will slew
Tuning Waveforms. The RC Time
, x = 1, 2 or 3) to satisfy
AMP
DRP
CSx
output pin with maximum rise
in Figures 14 and 16). The
⋅ C
CSx
network to provide a
CSx
http://onsemi.com
(33)
and
CSx
22
operating at full steady−state load, the peak−to−peak voltage
ripple (V
as shown in Figure 31. Less than 10 mV
ripple on the COMP pin will contribute to jitter.
9. Current Limit Setting
block diagram) exceeds the voltage on the OCSET pin, the
part will enter hiccup mode. For inductive sensing, the
OCSET pin voltage should be set based on the inductor’s
maximum resistance (R
the inductor’s resistance increase due to current heating and
ambient temperature rise. Also, depending on the current
sense points, the circuit board may add additional resistance.
In general, the temperature coefficient of copper is +0.39%
per _C. If using a current sense resistor (R
pin voltage should be set based on the maximum value of the
sense resistor. To set the level of the OCSET pin:
Quickly, Which Is Evident from the Small Spike in Its
Voltage When the Load Is Applied or Removed. The
Output Voltage Transitions More Slowly Because of
When the output of the current sense amplifier (COx in the
Loop Gain/Bandwidth Too High. COMP Moves Too
Figure 30. The Value of C
Loop Gain/Bandwidth Too Low. COMP Slews Too
Figure 29. The Value of C
Slowly Which Results in Overshoot in V
PP
) on the COMP pin should be less than 20 mV
the COMP Spike.
LMAX
). The design must consider
AMP
AMP
Is Too Low and the
Is Too High and the
PP
is ideal. Excessive
SENSE
), the I
OUT
.
LIM
PP