ncp5306dw ON Semiconductor, ncp5306dw Datasheet - Page 14

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ncp5306dw

Manufacturer Part Number
ncp5306dw
Description
Threephase Vrm 9.0 Buck Controller
Manufacturer
ON Semiconductor
Datasheet
Due to the faster than ideal RC time constant, there is an
overshoot of 50% and the overshoot decays with a 200 μs
time constant. With this compensation, the OCSET pin
threshold must be set more than 50% above the full load
current to avoid triggering current limit during a large output
load step.
Transient Response and Adaptive Voltage Positioning
filter is frequently sized larger than ripple currents require in
order to reduce voltage excursions during load transients.
Adaptive voltage positioning can reduce peak−peak output
voltage deviations during load transients and allow for a
smaller output filter. The output voltage can be set higher
than nominal at light loads to reduce output voltage sag
when the load current is applied. Similarly, the output
voltage can be set lower than nominal during heavy loads to
reduce overshoot when the load current is removed. For low
current applications, a droop resistor can provide fast,
accurate adaptive positioning. However, at high currents,
the loss in a droop resistor becomes excessive. For example,
a 50 A converter with a 1 mΩ resistor would provide a 50
mV change in output voltage between no load and full load
and would dissipate 2.5 W.
alternative to using a droop resistor, but it must respond to
changes in load current. Figure 18 shows how AVP works.
The waveform labeled “normal” shows a converter without
AVP. On the left, the output voltage sags when the output
current is stepped up and later overshoots when current is
stepped back down. With fast (ideal) AVP, the peak−to−peak
excursions are cut in half. In the slow AVP waveform, the
output voltage is not repositioned quickly enough after
current is stepped up and the upper limit is exceeded.
voltage based on the output current of the converter. (Refer
to the application diagram in Figure 1). To set the no−load
positioning, a resistor is placed between the output voltage
and V
across the resistor to adjust the no−load output voltage. The
V
in the datasheets.
voltage as the V
through the V
the V
by the V
output voltage to decrease.
transient is controlled primarily by power stage output
impedance, and by the ESR and ESL of the output filter. The
transition between fast and slow positioning is controlled by
the total ramp size and the error amp compensation. If the
ramp size is too large or the error amp too slow, there will be
a long transition to the final voltage after a transient. This
will be most apparent with low capacitance output filters.
FB
For applications with fast transient currents, the output
Lossless adaptive voltage positioning (AVP) is an
The controller can be configured to adjust the output
During no−load conditions, the V
The response during the first few microseconds of a load
bias current is dependent on the value of R
DRP
FB
DRP
pin. The V
pin voltage increases proportionally. Current set
resistor offsets the V
DRP
FB
pin, so none of the V
resistor. When output current increases,
FB
bias current will develop a voltage
FB
bias current, causing the
DRP
FB
pin is at the same
bias current flows
OSC
as shown
http://onsemi.com
14
Overvoltage Protection
the normal operation of the Enhanced V
with synchronous rectifiers. The control loop responds to an
overvoltage condition within 40 ns, causing the GATEx
output to shut off. The (external) MOSFET driver should
react normally to turn off the top MOSFET and turn on the
bottom MOSFET. This results in a “crowbar” action to
clamp the output voltage and prevent damage to the load.
The regulator will remain in this state until the overvoltage
condition ends or the input voltage is pulled low.
Power Good
(PWRGD) signal must be asserted when the output voltage
is within a window defined by the VID code, as shown in
Figure 19.
comparators to accurately sense the output voltage. The
effect of the PWRGD lower threshold can be modified using
a resistor divider from the output to PWRGDS to ground, as
shown in Figure 20.
Overvoltage protection (OVP) is provided as a result of
According to the latest specifications, the Power Good
The PWRGDS pin is provided to allow the PWRGD
Load Step with Fast RC Time Constant (50 μs/div)
Figure 17. Inductive Sensing Waveform During a
Figure 18. Adaptive Voltage Positioning
Normal
Slow
Fast
Limits
Adaptive Positioning
Adaptive Positioning
2
control topology

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