lt3070 Linear Technology Corporation, lt3070 Datasheet - Page 17
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lt3070
Manufacturer Part Number
lt3070
Description
5a, Low Noise, Programmable Output, 85mv Dropout Linear Regulator
Manufacturer
Linear Technology Corporation
Datasheet
1.LT3070.pdf
(28 pages)
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ApplicAtions inFormAtion
set by a window comparator defines the logic Hi-Z state
and disables the margining function.
The MARGTOL pin selects the absolute value of margin-
ing (1%, 3% or 5%) if enabled by the MARGSEL input.
The logic low threshold is less than 250mV referenced to
GND and enables either ±1% change in V
on the state of the MARGSEL pin. The logic high threshold
is greater than V
change in V
pin. The voltage range between these two logic thresholds
as set by a window comparator defines the logic Hi-Z state
and enables either ±3% change in V
state of the MARGSEL pin.
Table 2: Programming Margining
Enable Function—Turning On and Off
The EN pin enables/disables the output device only. The
LT3070 reference and all support functions remain active
if V
low puts the LT3070 into nap mode. In nap mode, the
reference circuit is active, but the output is disabled and
quiescent current decreases.
Drive the EN pin with either a digital logic port or an open-
collector NPN or an open-drain NMOS terminated with
a pull-up resistor to V
less than 35k to meet the V
unused, connect EN to BIAS.
Input Undervoltage Lockout on BIAS Pin
An internal undervoltage lockout (UVLO) comparator
monitors the BIAS supply voltage. If V
the UVLO threshold, all functions shut down, the pass
transistor is gated off and output current falls to zero. The
BIAS
MARGSEL
is above its UVLO threshold. Pulling the EN pin
0
0
0
Z
Z
Z
1
1
1
OUT
depending on the state of the MARGSEL
BIAS
– 250mV and enables either ±5%
BIAS
MARGTOL
. The pull-up resistor must be
0
Z
1
0
Z
1
0
Z
1
IH
condition of the EN pin. If
OUT
depending on the
BIAS
% of V
OUT
drops below
depending
–1
–3
–5
OUT(NOM)
0
0
0
1
3
5
typical BIAS pin UVLO threshold is 1.55V on the rising
edge of V
of hysteresis on the falling edge of V
High Efficiency Linear Regulator—Input-to-Output
Voltage Control
The VIOC (voltage input-to-output control) pin is a function
to control a switching regulator and facilitate a design solu-
tion that maximizes system efficiency at high load currents
and still provides low dropout voltage performance.
The VIOC pin is the output of an integrated transcon-
ductance amplifier that sources and sinks about 250µA
of current. It typically regulates the output of most LTC
switching regulators or LTM
current from the ITH compensation node. The VIOC function
controls a buck regulator powering the LT3070’s input by
maintaining the LT3070’s input voltage to V
This 300mV V
provide fast transient response and good high frequency
PSRR while minimizing power dissipation and maximizing
efficiency. For example, 1.5V to 1.2V conversion and 1.3V
to 1V conversion yield 1.5W maximum power dissipation
at 5A full output current.
Figure 2 depicts that the switcher’s feedback resistor net-
work sets the maximum switching regulator output voltage
if the linear regulator is disabled. However, once the LT3070
is enabled, the VIOC feedback loop decreases the switching
regulator output voltage back to V
Using the VIOC function creates a feedback loop between
the LT3070 and the switching regulator. As such, the feed-
back loop must be frequency compensated for stability.
Fortunately, the connection of VIOC to many LTC switching
regulator ITH pins represents a high impedance charac-
teristic which is the optimum circuit node to frequency
compensate the feedback loop. Figure 2 illustrates the
typical frequency compensation network used at the VIOC
node to GND.
The VIOC amplifier characteristics are:
g
If t he V IOC f unction i s n ot u sed, t erminate t he V IOC p in t o G ND
with a small capacitor (1000pF) to prevent oscillations.
m
= 3.2mS, I
BIAS
. The UVLO circuit incorporates about 150mV
IN
-V
OUT
OUT
= ±250µA, BW = 10MHz.
differential voltage is chosen to
®
power modules, by sinking
OUT
BIAS
+ 300mV.
.
LT3070
OUT
+ 300mV.
3070f
®