l6928 STMicroelectronics, l6928 Datasheet - Page 7

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l6928

Manufacturer Part Number
l6928
Description
High Efficiency Monolithic Synchronous Step Down Regulator
Manufacturer
STMicroelectronics
Datasheet

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L6928
4
Operation description
The main loop uses slope compensated PWM current mode architecture. Each cycle the
high side MOSFET is turned on, triggered by the oscillator, so that the current flowing
through it (the same as the inductor current) increases. When this current reaches the
threshold (set by the output of the error amplifier E/A), the peak current limit comparator
PEAK_CL turns off the high side MOSFET and turns on the low side one until the next clock
cycle begins or the current flowing through it goes down to zero (ZERO CROSSING
comparator). The peak inductor current required to trigger PEAK_CL depends on the slope
compensation signal and on the output of the error amplifier.
In particular, the error amplifier output depends on the VFB pin voltage. When the output
current increases, the output capacitor is discharged and so the VFB pin decreases. This
produces increase of the error amplifier output, so allowing a higher value for the peak
inductor current. For the same reason, when due to a load transient the output current
decreases, the error amplifier output goes low, so reducing the peak inductor current to
meet the new load requirements.
The slope compensation signal allows the loop stability also in high duty cycle conditions
(see related section)
Figure 2.
COM P
COM P
P
P
GOOD
GOOD
FB
FB
Device block diagram
V
V
V
V
REF
REF
REF
REF
0.6V
0.6V
0.9V
0.9V
CONSUM PTION
CONSUM PTION
NOISE/
NOISE/
SYNC
SYNC
LOW
LOW
E/A
E/A
P
P
GOOD
GOOD
OVP
OVP
CONTROL
CONTROL
LOOP
LOOP
OSCILLATOR
OSCILLATOR
ZERO
ZERO
CROSSING
CROSSING
RUN
RUN
GND
GND
VALLEY
VALLEY
PEAK
PEAK
CL
CL
CL
CL
GND
GND
Vcc
Vcc
SLOPE
SLOPE
SENSE
SENSE
SENSE
SENSE
P
P
N
N
MOS
MOS
MOS
MOS
DRIVER
DRIVER
GND
GND
Vcc
Vcc
Operation description
VCC
VCC
GND
GND
POWER
POWER
POWER
POWER
P
P
N
N
MOS
MOS
MOS
MOS
LX
LX
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