ncp1651 ON Semiconductor, ncp1651 Datasheet - Page 23

• Manufacturer Part Number: ncp1651
• Description: Single Stage Power Factor Controller
• Manufacturer: ON Semiconductor

allows for a repeatable, fast restart. See Figure 3 for timing
diagram.
voltage remains above the UVLO undervoltage trip point. If
the V
operation of the unit will be disabled, the startup circuit will
again be enabled, and will charge the V
on voltage level. At this point the startup circuit will turn off
and the unit will remain in the shutdown mode. This will
continue for the next seven cycles. On the eighth cycle, the
NPC1651 will again become operational. If the V
remains above the undervoltage trip point the unit will
continue to operate, if not the unit will begin another
divide−by−eight cycle.
the power dissipation of the chip under overload conditions
and allow it to recycle indefinitely without overheating the
chip.
the auxiliary voltage to remain above the UVLO turn−off level
before the V
voltage generated by the inductor winding fails to exceed the
shutdown voltage before the capacitor reduces to the UVLO
undervoltage turn−off level, the unit will shut down and go into
a divide−by−eight cycle, and will never start. If this occurs, the
V
CC
The unit will remain operational as long as the V
The purpose of the divide−by−eight counter is to reduce
It is critical that the output voltage reaches a level that allows
capacitor value should be increased.
CC
voltage is reduced to the undervoltage trip point,
CC
cap has discharged to that level. If the bias
CC
cap up to the turn
CC
voltage
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CC
NCP1651
23
Soft−Start Circuit
low output level will cause the output duty cycle to go to
zero. This will have the effect of soft−starting the unit at
turn−on, since the output is coupled to ground through a
capacitor.
the output current and the resistor at pin 11. For example, if
the output is saturated in the high state at turn on, it will
source 50 mA. If pin 11 is terminated with a 2.2 kW resistor
and a 0.01 F capacitor, the initial step will be:
and the rate of rise will be:
or, 560 ms until the output is at 2.8 volts, which corresponds
to full duty cycle.
capacitance on that pin discharged to 1.5 volts so that the
FB/SD signal will also slew up from a low power level to a
high power level. When the unit is in standby mode, the
clamp will be enabled. At the same time as the unit is
enabled, the clamp will be disabled to allow the feedback
signal to control the loop.
Figure 24, if additional time is desired.
The AC error amplifier has been configured such that a
There will be an initial offset of the output voltage due to
There is also a clamp on pin 8 that will keep the
An external soft−start circuit can be added, as shown in
50 mA
50 mA 0.01 mF + 5 mV ms
2.2 k + 0.11 volts