ncp1560hdr2g ON Semiconductor, ncp1560hdr2g Datasheet - Page 15

• Manufacturer Part Number: ncp1560hdr2g
• Description: Full Featured Voltage Mode Pwm Controller
• Manufacturer: ON Semiconductor

Current Limit
cycle−by−cycle and cycle skip. It allows the NCP1560 to
handle momentary and hard shorts differently for the best
tradeoff in performance and safety. The outputs are disabled
typically 90 ns after a current limit fault is detected.
cycle (reducing the duty cycle) if the voltage on the CS pin
exceeds 0.48 V. The cycle skip mode is enabled if the
voltage on the CS pin reaches 0.57 V. Once a cycle skip fault
is detected, the outputs are disabled, the soft−start and cycle
skip capacitors are discharged, and the cycle skip period
(T
11 V, a soft−start sequence commences. The possible
minimum OFF time is set by C
OFF time is generally greater than the cycle skip period
because it is the cycle skip period added to the time it takes
V
Oscillator
external resistor connected between the R
The oscillator is designed to operate up to 500 kHz.
AUX
The NCP1560 has two over current protection modes,
The cycle−by−cycle mode terminates the conduction
Once the cycle skip period is complete and V
The NCP1560 oscillator frequency is set by a single
CSKIP
CS Voltage
to reach 11 V.
) commences.
V
V
AUX(on)
AUX(off)
OUT2
OUT1
V
I
I
LIM2
LIM1
AUX
0 V
0 V
0 V
0 V
0 V
OPERATION
NORMAL
Cycle Skip
Voltage
CSKIP
I
LIM1
Figure 32. Over Current Faults Timing Diagram
. However, the actual
I
LIM2
T
pin and GND.
AUX
reaches
http://onsemi.com
RESET
T
CSKIP
15
(C
capacitor is discharged followed by a charge cycle. The
charge current is 12.3 mA. The cycle skip period ends when
the voltage on the cycle skip capacitor reaches 2.0 V. The
cycle skip capacitor is calculated using the equation below:
requires a cycle skip capacitor of 68 pF. The differences
between the cycle−by−cycle and cycle skip modes are
observed in Figure 32.
manufacturing to 1.3 V for an R
by R
10 pF capacitor as shown in Figure 2. The period ends
(capacitor is discharged) once the Oscillator Ramp reaches
2.0 V. If R
slope decrease, thus reducing the frequency. If R
the opposite effect is obtained. Figure 16 shows the
relationship between R
The cycle skip period is set by an external capacitor
Using the above equation, a cycle skip period of 11.0 ms
The voltage on the R
CSKIP
T
generates an Oscillator Ramp by charging an internal
SOFT−START
). Once a cycle skip fault is detected, the cycle skip
T
increases, the current and the Oscillator Ramp
C CSKIP [
T
T
and the oscillator frequency.
pin is laser trim adjusted during
T CSKIP
OPERATION
NORMAL
T
of 101 kW. A current set
2 V
12.3 mA
T
decreases,