ncp1250 ON Semiconductor, ncp1250 Datasheet - Page 17

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ncp1250

Manufacturer Part Number
ncp1250
Description
Ncp1250 Current-mode Pwm Controller For Off-line Power Supplies
Manufacturer
ON Semiconductor
Datasheet

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Slope Compensation
signal. This is the buffered oscillator clock delivered only
during the on time. Its amplitude is around 2.5 V at the
maximum duty−cycle. Ramp compensation is a known
means used to cure sub harmonic oscillations in Continuous
Conduction
2.5 V swing. If the clock operates at a 65 kHz frequency,
then the available oscillator slope corresponds to:
The NCP1250 includes an internal ramp compensation
In the NCP1250 controller, the oscillator ramp features a
Figure 45. Inserting a Resistor in Series with the Current Sense Information Brings Ramp Compensation and
Mode
Figure 44. An Auto−Recovery Hiccup Mode is Activated for Faults Longer than 100 ms
(CCM)
reset
latch
−2.72
−2.72
−11.5
−11.5
23.6
23.6
14.8
14.8
6.05
6.05
operated
−2.12
−2.12
−8.13
−8.13
15.9
15.9
9.90
9.90
3.89
3.89
445m
445m
Stabilizes the Converter in CCM Operation.
4.32
4.32
3.35
3.35
2.38
2.38
1.41
1.41
1
1
+
vcc
vcc
from FB
setpoint
500u
500u
current−mode
2
2
vdrv
vdrv
ON
3
3
ilprim
ilprim
LEB
http://onsemi.com
1.50m
1.50m
17
20k
time in seconds
time in seconds
converters. These oscillations take place at half the
switching frequency and occur only during CCM with a
duty−cycle greater than 50%. To lower the current loop gain,
one usually injects between 50% and 100% of the inductor
downslope. Figure 45 depicts how internally the ramp is
generated. Please note that the ramp signal will be
disconnected from the CS pin, during the off time.
2.50m
2.50m
S
SS
SS
CS
ramp
0V
2.5 V
+
+ 133 kV s or 133 mV ms
Rcomp
3.50m
3.50m
V
ramp,peak
V
V
V (t)
V
DRV
DRV
cc
cc
I
I
L
L
T
p
p
sw
(t)
(t)
D
4.50m
4.50m
max
Rsense
+
1
1
2
2
3
3
2.5
15m
0.8
(eq. 10)

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