viper53esp STMicroelectronics, viper53esp Datasheet - Page 10

• Manufacturer Part Number: viper53esp
• Description: Off-line Primary Switch
• Manufacturer: STMicroelectronics

Current Mode Topology
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Current Mode Topology
The VIPer53E implements the conventional current mode control method for regulating the
output voltage. This kind of feedback includes two nested regulation loops:
The inner loop controls the peak primary current cycle by cycle. When the Power MOSFET
output transistor is on, the inductor current (primary side of the transformer) is monitored
with a SenseFET technique and converted into a voltage. When V
power switch is turned off. This structure is completely integrated as shown on the Block
Diagram of
time function and the PWM latch. The following formula gives the peak current in the Power
MOSFET according to the compensation voltage:
The outer loop defines the level at which the inner loop regulates peak current in the power
switch. For this purpose, V
optocoupler in secondary feedback configuration, see
accordingly the peak drain current for each switching cycle.
As the inner loop regulates the peak primary current in the primary side of the transformer,
all input voltage changes are compensated for before impacting the output voltage. This
results in an improved line regulation, instantaneous correction to line changes, and better
stability for the voltage regulation loop.
Current mode topology also provides a good converter start-up control. The compensation
voltage can be controlled to increase slowly during the start-up phase, so the peak primary
current will follow this soft voltage slope to provide a smooth output voltage rise, without any
overshoot. The simpler voltage mode structure which only controls the duty cycle, leads
generally to high current at start-up with the risk of transformer saturation.
An integrated blanking filter inhibits the PWM comparator output for a short time after the
integrated Power MOSFET is switched on. This function prevents anomalous or premature
termination of the switching pulse in the case of current spikes caused by primary side
transformer capacitance or secondary side rectifier reverse recovery time when working in
continuous mode.
Figure on page
COMP
1, with the current amplifier, the PWM comparator, the blanking
I
is driven by the feedback network (TL431 through an
Dpeak
DocRev1
=
V
------------------------------------------------- -
COMP
H
COMP
–
V
COMPos
Figure 3 on page
VIPer53EDIP - E / VIPer53ESP - E
S
reaches V
8) and is sets
COMP
, the