hm6208h HITACHI, hm6208h Datasheet - Page 8
hm6208h
Manufacturer Part Number
hm6208h
Description
Manufacturer
HITACHI
Datasheet
1.HM6208H.pdf
(11 pages)
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HM6208H Series
Write Timing Waveform (1) (WE Controlled)
8
Notes: 1.
Address
Dout
WE
Din
CS
2.
3.
4.
5.
A write occurs during the overlap of a low CS and a low WE (t
t
During this period, I/O pins are in the output state. The input signals of the opposite
phase to the outputs must not be applied.
If CS is low during this period, I/O pins are in the output state. The data input signals of
opposite phase to the outputs must not be applied to them.
Dout is the same phase of write data of this write cycle.
WR
is measured from the earlier of CS or WE going high to the end of the write cycle.
t
AS
t
t
WZ
AW
t
*3
CW
t
WC
t
WP
*1
High impedance
Valid Data
t
DW
t
t
DH
OW
t
WR
*4
*4
*2
WP
).
t
OH
*5