m36dr432ad STMicroelectronics, m36dr432ad Datasheet - Page 42

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m36dr432ad

Manufacturer Part Number
m36dr432ad
Description
32 Mbit 2mb X16, Dual Bank, Page Flash Memory And 4 Mbit 256kb X16 Sram, Multiple Memory Product
Manufacturer
STMicroelectronics
Datasheet

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M36DR432AD, M36DR432BD
Table 24. SRAM Write AC Characteristics
Note: 1. t
Figure 24. SRAM Low V
42/52
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
ELWH
WHQX
DVWH
WHAX
WHDX
WLWH
AVWH
AVWL
BLWH
WLQZ
EHAX
AVAV
AVEL
V DDS
2. t
3. t
4. A Write occurs during the overlap (t
ES
UBS or LBS for single byte operation or simultaneously asserting UBS and LBS for double byte operation. A write ends at the ear-
liest transition when ES goes High and WS goes High. The t
AS
WR
CW
,
is measured from the address valid to the beginning of write.
V DR
is measured from the end or write to the address change. t
is measured from ES going Low end of write.
1.65 V
t
t
t
t
t
t
CW
WR
WR
WP
t
AS
AS
1.0 V
t
t
t
t
t
WHZ
t
Alt
OW
WC
AW
BW
DW
DH
(1)
(1)
(4)
(2)
(3)
(2)
Write Cycle Time
Address Valid to Chip Enable Low
Address Valid to Write Enable High
Address Valid to Write Enable Low
UBS, LBS Valid to End of Write
Input Valid to Write Enable High
Chip Enable High to Address Transition
Chip Select to End of Write
Write Enable High to Address Transition
Write Enable High to Input Transition
Write Enable High to Output Transition
Write Enable Low to Output Hi-Z
Write Enable Pulse Width
DDS
Data Retention AC Waveforms, ES Controlled
WP
tCDR
) of Low ES and Low WS. A write begins when ES goes Low and WS goes Low with asserting
Parameter
DATA RETENTION MODE
ES
WP
WR
is measured from the beginning of write to the end of write.
V DDS – 0.2V
applied in case a write ends as ES or WS goes High.
tR
Min
70
60
30
60
10
50
0
0
0
0
0
SRAM
70
Max
60
25
AI07325
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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