w19b320b Winbond Electronics Corp America, w19b320b Datasheet - Page 10

• Manufacturer Part Number: w19b320b
• Description: W19b320bt/b Datasheet
• Manufacturer: Winbond Electronics Corp America

Please note that the #WP/ACC pin can not be at V
otherwise, the device will be damaged. In addition, the #WP/ACC pin can not be left floating;
otherwise, an unconnected inconsistent behavior will occur.
AUTOSELECT Functions
When the system writes the AUTOSELECT command sequence, the device enters the
AUTOSELECT mode. The system can then read AUTOSELECT codes from the internal register
(which is separate from the memory array) on DQ0 –DQ7. The standard read cycle timings are
applied in this mode. Please refer to the AUTOSELECT Mode and AUTOSELECT Command
Sequence sections for more information.
6.1.4
When the system is not reading or writing to the device, the device will be in a standby mode. In this
mode, current consumption is greatly reduced, and the outputs are in the high impedance state,
independent from the #OE input.
When the
mode (note that this is a more restricted voltage range than V
but not within V
The device requires standard access time (t
modes, before it is ready to read data.
When the device is deselected during erasing or programming, the device initiates active current until
the operation is completed.
6.1.5
The automatic sleep mode minimizes device's energy consumption. When addresses remain stable
for t
independent from the #CE , #WE , and #OE control signals. Standard address access timings provide
new data when addresses are changed. In sleep mode, output data is latched and always available to
the system.
6.1.6
The #RESET pin provides a hardware method to reset the device to reading array data. When the
#RESET pin is set to low for at least a period of t
operation in progress, tri-states all output pins, and ignores all read/write commands for the duration of
the #RESET pulse. The device also resets the internal state machine to reading array data mode. To
ensure data integrity, the interrupted operation needs to be reinitiated when the device is ready to
accept another command sequence.
Current is reduced for the duration of the #RESET pulse. When #RESET is held at V
device initiates the CMOS standby current (I
the standby current will be greater.
The #RESET pin may be tied to the system-reset circuitry. Thus the system reset would also reset the
device, enabling the system to read the boot-up firmware from the device.
If #RESET is asserted during the program or erase operation, the RY/#BY pin will be at “0” (busy) until
the internal reset operation is complete. If #RESET is asserted when a program or erase operation is
not processing (RY/#BY pin is “1”), the reset operation is completed within a time of t
Embedded Algorithms). After the #RESET pin returns to V
ACC
Standby Mode
Automatic Sleep Mode
#RESET: Hardware Reset Pin
+ 30ns, the device will enable this mode automatically. The automatic sleep mode is
#CE
DD
and
±
#RESET
0.3V, the device will be in the standby mode, but the standby current will be greater.
pins are both held at V
CE
) for read access when the device is in either of these standby
CC4
). If #RESET is held at V
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W19B320BT/B DATASHEET
HH
DD
RP
for operations except accelerated programming;
±
, the device will immediately terminate every
0.3V, the device enters into the CMOS standby
IH
IH
, the system can read data t
.) When
Publication Release Date:Dec.25, 2007
#CE
IL
and
but not within V
#RESET
READY
RH.
are held at V
SS
Revisionv A3
±
(not during
SS
0.3V, the
±
0.3V,
IH
,