lh5164ash Sharp Microelectronics of the Americas, lh5164ash Datasheet - Page 7
lh5164ash
Manufacturer Part Number
lh5164ash
Description
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LH5164ASH.pdf
(10 pages)
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NOTES:
1. The writing occurs during an overlapping period of CE
2. t
3. t
4. t
5. If CE
6. While I/O pins are in the output state, input signals with the opposite logic level must not be applied.
to the time when the writing is finished.
output will remain high-impedance.
CW
AS
WR
is defined as the time from address change to writing start.
is defined as the time from the last occuring transition, either CE
is defined as the time from writing finish to address change.
1
LOW transition or CE
A
0
8) Static RAM
D
- A
CE
CE
WE
OUT
D
OE
12
IN
1
2
2
HIGH transition occurs at the same time or after WE LOW transition, the
(NOTE 5)
(NOTE 6)
Figure 6. Write Cycle 1 (OE Controlled)
(NOTE 3)
t
AS
1
= 'LOW,' CE
t
OHZ
t
AW
t
WC
2
1
= 'HIGH,' and WE = 'LOW' (t
LOW transition or CE
(NOTE 2)
t
CW
t
CW
(NOTE 1)
HIGH-Z
t
WP
t
DW
(NOTE 4)
DATA VALID
2
t
t
t
HIGH transition,
WR
WR
WR
t
DH
WP
).
LH5164ASH
5164ASH-4
7