24c32a Microchip Technology Inc., 24c32a Datasheet - Page 9

• Manufacturer Part Number: 24c32a
• Description: 32k 5.0v I 2 C? Serial Eeprom
• Manufacturer: Microchip Technology Inc.

7.0
7.1
The A0..A2 inputs are used by the 24C32A for multiple
device operation and conform to the 2-wire bus stan-
dard. The levels applied to these pins define the
address block occupied by the device in the address
map. A particular device is selected by transmitting the
corresponding bits (A2, A1, A0) in the control byte
(Figure 3-3).
7.2
This is a Bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pullup
resistor to V
400 kHz)
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL HIGH are
reserved for indicating the START and STOP condi-
tions.
7.3
This input is used to synchronize the data transfer from
and to the device.
7.4
This pin must be connected to either V
If tied to V
(read/write the entire memory 000-FFF).
If tied to V
entire memory will be write-protected. Read operations
are not affected.
2004 Microchip Technology Inc.
PIN DESCRIPTIONS
A0, A1, A2 Chip Address Inputs
SDA Serial Address/Data Input/Output
SCL Serial Clock
WP
SS
CC
CC
, normal memory operation is enabled
, WRITE operations are inhibited. The
(typical 10K
for 100 kHz, 2 K
SS
or V
CC
.
for
8.0
The SCL and SDA inputs have filter circuits which sup-
press noise spikes to ensure proper device operation
even on a noisy bus. All I/O lines incorporate Schmitt
triggers for 400 kHz (Fast Mode) compatibility.
9.0
This design incorporates a power standby mode when
the device is not in use and automatically powers off
after the normal termination of any operation when a
stop bit is received and all internal functions are com-
plete. This includes any error conditions, i.e., not
receiving an acknowledge or stop condition per the
two-wire bus specification. The device also incorpo-
rates V
(data corruption) during low-voltage conditions. The
V
in standby mode in order to further reduce power con-
sumption.
DD
monitor circuitry is powered off when the device is
DD
NOISE PROTECTION
POWER MANAGEMENT
monitor circuitry to prevent inadvertent writes
24C32A
DS21163E-page 9