24c32a Microchip Technology Inc., 24c32a Datasheet - Page 6

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24c32a

Manufacturer Part Number
24c32a
Description
32k 5.0v I 2 C? Serial Eeprom
Manufacturer
Microchip Technology Inc.
Datasheet

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24C32A
4.0
4.1
Following the start condition from the master, the con-
trol code (four bits), the device select (three bits), and
the R/W bit which is a logic low are clocked onto the bus
by the master transmitter. This indicates to the
addressed slave receiver that a byte with a word
address will follow after it has generated an acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the high-order
byte of the word address and will be written into the
address pointer of the 24C32A. The next byte is the
least significant address byte. After receiving another
acknowledge signal from the 24C32A the master
device will transmit the data word to be written into the
addressed memory location.
The 24C32A acknowledges again and the master gen-
erates a stop condition. This initiates the internal write
cycle, and during this time the 24C32A will not gener-
ate acknowledge signals (Figure 4-1).
FIGURE 4-1:
FIGURE 4-2:
DS21163E-page 6
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
WRITE OPERATION
Byte Write
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
BYTE WRITE
PAGE WRITE
S
T
A
R
T
S
CONTROL
BYTE
S
T
A
R
T
S
CONTROL
A
C
K
BYTE
0 0 0 0
HIGH BYTE
ADDRESS
A
C
K
0 0 0 0
HIGH BYTE
ADDRESS
A
C
K
LOW BYTE
ADDRESS
4.2
The write control byte, word address and the first data
byte are transmitted to the 24C32A in the same way as
in a byte write. But instead of generating a stop condi-
tion, the master transmits up to 32 bytes which are tem-
porarily stored in the on-chip page buffer and will be
written into memory after the master has transmitted a
stop condition. After receipt of each word, the five lower
address pointer bits are internally incremented by one.
If the master should transmit more than 32 bytes prior
to generating the stop condition, the address counter
will roll over and the previously received data will be
overwritten. As with the byte write operation, once the
stop condition is received, an internal write cycle will
begin. (Figure 4-2).
Note:
A
C
K
LOW BYTE
ADDRESS
A
C
K
Page Write
Page write operations are limited to writing
bytes within a single physical page, regard-
less of the number of bytes actually being
written. Physical page boundaries start at
addresses that are integer multiples of the
page buffer size (or ‘page size’) and end at
addresses that are integer multiples of
[page size - 1]. If a page write command
attempts to write across a physical page
boundary, the result is that the data wraps
around to the beginning of the current page
(overwriting data previously stored there),
instead of being written to the next page as
might be expected. It is therefore neces-
sary for the application software to prevent
page write operations that would attempt to
cross a page boundary.
DATA BYTE 0
A
C
K
2004 Microchip Technology Inc.
DATA
DATA BYTE 31
A
C
K
S
T
O
P
P
A
C
K
S
T
O
P
P

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