m5m5v5636gp-16 Renesas Electronics Corporation., m5m5v5636gp-16 Datasheet - Page 5

• Manufacturer Part Number: m5m5v5636gp-16
• Description: 18874368-bit 524288-word By 36-bit Network Sram
• Manufacturer: Renesas Electronics Corporation.

DC OPERATED TRUTH TABLE
Note4. LBO# is DC operated pin.
Note5. NC means No Connection.
Note6. See BURST SEQUENCE TABLE about interleaved and Linear Burst Sequence.
BURST SEQUENCE TABLE
Interleaved Burst Sequence (when LBO# = HIGH or NC)
Linear Burst Sequence (when LBO# = LOW)
Note7. The burst sequence wraps around to its initial state upon completion.
TRUTH TABLE
Note8. “H” = input VIH; “L” = input VIL; “X” = input VIH or VIL.
Note9. BWx#=H means all Synchronous Byte Write Enables (BWa#,BWb#,BWc#,BWd#) are HIGH. BWx#=L means one or more
Note10. All inputs except G# and ZZ must meet setup and hold times around the rising edge (LOW to HIGH) of CLK.
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LBO#
First access, latch external address
Second access(first burst address)
Third access(second burst address)
Fourth access(third burst address)
E1#
Name
Operation
First access, latch external address
Second access(first burst address)
Third access(second burst address)
Fourth access(third burst address)
H
X
X
X
X
X
X
X
X
X
L
L
L
L
Synchronous Byte Write Enables are LOW.
E2
H
H
H
H
X
L
X
X
X
X
X
X
X
X
E3#
H
X
X
X
X
X
X
X
X
X
L
L
L
L
HIGH or NC
Input Status
LOW
Operation
ZZ
H
L
L
L
L
L
L
L
L
L
L
L
L
L
ADV
H
H
H
H
H
X
X
L
L
L
L
L
L
L
Interleaved Burst Sequence
Linear Burst Sequence
W#
X
X
X
X
H
X
H
X
X
X
X
X
L
L
BWx#
X
X
X
X
X
X
X
X
H
H
X
X
L
L
G#
Operation
X
X
X
X
H
H
X
X
X
X
X
X
L
L
latched A18~A2
latched A18~A2
latched A18~A2
latched A18~A2
latched A18~A2
latched A18~A2
A18~A2
A18~A2
CKE#
A18~A2
A18~A2
H
L
L
L
L
L
L
L
L
L
L
L
L
X
L->H
L->H
L->H
L->H
L->H
L->H
L->H
L->H
L->H
L->H
L->H
L->H
L->H
CLK
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
X
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
DQ
Q
Q
D
D
-
0 , 0
0 , 1
1 , 0
1 , 1
0 , 0
0 , 1
1 , 0
1 , 1
External
External
External
Address
Current
None
None
None
None
None
None
used
Next
Next
Next
Next
M5M5V5636GP –16
0 , 1
0 , 0
1 , 1
1 , 0
Deselect Cycle
Deselect Cycle
Deselect Cycle
Continue Deselect Cycle
Read Cycle, Begin Burst
Read Cycle, Continue Burst
NOP/Dummy Read, Begin Burst
Dummy Read, Continue Burst
Write Cycle, Begin Burst
Write Cycle, Continue Burst
NOP/Write Abort, Begin Burst
Write Abort, Continue Burst
Ignore Clock edge, Stall
Snooze Mode
0 , 1
1 , 0
1 , 1
0 , 0
M5M5V5636GP-16 REV.2.0
A1,A0
A1,A0
1 , 0
1 , 1
0 , 0
0 , 1
Operation
1 , 0
1 , 1
0 , 0
0 , 1
Renesas LSIs
1 , 1
1 , 0
0 , 1
0 , 0
1 , 1
0 , 0
0 , 1
1 , 0