s-24cs64a Seiko Instruments Inc., s-24cs64a Datasheet - Page 18

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s-24cs64a

Manufacturer Part Number
s-24cs64a
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet

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18
2-WIRE CMOS SERIAL E
S-24CS64A
8. Address Increment Timing
Write Inhibition Function at Low Power Voltage
The S-24CS64A have a detection circuit for low power voltage. The detection circuit cancels a write
instruction when the power voltage is low or the power switch is on. The detection voltage is 1.85 V
typically and the release voltage is 1.95 V typically, the hysteresis of approximate 0.1 V thus exists. (See
Figure 20 .)
When a low power voltage is detected, a write instruction is canceled at the reception of a stop condition.
When the power voltage lowers during a data transmission or a write operation, the date at the address of
the operation is not assured.
The timing for the automatic address increment is the falling edge of the SCL clock for the 8th bit of the
read data in read operation and the the falling edge of the SCL clock for the 8th bit of the received data in
write operation.
SCL
SDA
SCL
SDA
Power supply voltage
R / W=1
R / W=0
8
8
Figure 18 Address Increment Timing in Reading
Figure 19 Address Increment Timing in Writing
2
PROM
Figure 20 Operation at low power voltage
ACK Output
Detection voltage (-V
ACK Output
9
9
1.85 V typ.
Seiko Instruments Inc.
D7 Output
D7 Input
DET
1
1
)
0.1 V approximately
Hysteresis width
Write Instruction
cancel
Address Increment
D0 Output
Release voltage (+V
Address Increment
D0 Input
8
8
1.95 V typ.
ACK Output
DET
)
9
9
Rev.4.1
_00

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