s-24cs64a Seiko Instruments Inc., s-24cs64a Datasheet - Page 11
s-24cs64a
Manufacturer Part Number
s-24cs64a
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet
1.S-24CS64A.pdf
(41 pages)
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Rev.4.1
3. Data Transmission
4. Acknowledge
Changing the SDA line while the SCL line is low, data is transmitted.
Changing the SDA line while the SCL line is high, a start or stop condition is recognized.
The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down
the SDA line to acknowledge the receipt of the 8-bit data.
When a internal write cycle is in progress, the device does not generate an acknowledge.
_00
(E
(E
(Master Output)
2
2
PROM Output)
PROM Input)
SDA
SCL
SDA
SCL
SDA
Start Condition
Figure 10 Acknowledge Output Timing
Figure 9 Data Transmission Timing
t
SU.DAT
1
Seiko Instruments Inc.
t
HD.DAT
2-WIRE CMOS SERIAL E
8
t
Acknowledge
AA
Output
9
t
DH
S-24CS64A
2
PROM
11