m29f800at STMicroelectronics, m29f800at Datasheet - Page 5

• Manufacturer Part Number: m29f800at
• Description: 8 Mbit 1mb X8 Or 512kb X16, Boot Block Single Supply Flash Memory
• Manufacturer: STMicroelectronics

Table 4A. Bus Operations, BYTE = V
Note: X = V
Table 4B. Bus Operations, BYTE = V
Note: X = V
V
supplies the power for all operations (Read, Pro-
gram, Erase etc.).
The Command Interface is disabled when the V
Supply Voltage is less than the Lockout Voltage,
V
cidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the memo-
ry contents being altered will be invalid.
A 0.1 F capacitor should be connected between
the V
pin to decouple the current surges from the power
supply. The PCB track widths must be sufficient to
carry the currents required during program and
erase operations, I
V
all voltage measurements.
Bus Read
Bus Write
Output Disable
Standby
Read Manufacturer
Code
Read Device Code
Bus Read
Bus Write
Output Disable
Standby
Read Manufacturer
Code
Read Device Code
CC
LKO
SS
Ground. The V
Supply Voltage. The V
. This prevents Bus Write operations from ac-
Operation
Operation
CC
IL
IL
Supply Voltage pin and the V
or V
or V
IH
IH
.
.
CC4
SS
.
V
V
V
V
V
V
V
V
V
V
Ground is the reference for
E
X
E
X
IL
IL
IH
IL
IL
IL
IL
IH
IL
IL
CC
V
V
V
V
V
V
V
V
V
V
G
G
X
X
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
Supply Voltage
IL
IH
SS
V
V
V
V
V
V
V
V
V
V
W
W
X
X
IH
IL
IH
IH
IH
IH
IL
IH
IH
IH
Ground
Cell Address
Command Address
X
X
A0 = V
Others V
A0 = V
Others V
Cell Address
Command Address
X
X
A0 = V
Others V
A0 = V
Others V
CC
DQ15A–1, A0-A18
Address Inputs
Address Inputs
IL
IH
IL
IH
, A1 = V
, A1 = V
, A1 = V
, A1 = V
IL
IL
IL
IL
BUS OPERATIONS
There are five standard bus operations that control
the device. These are Bus Read, Bus Write, Out-
put Disable, Standby and Automatic Standby. See
Tables 4A and 4B, Bus Operations, for a summa-
ry. Typically glitches of less than 5ns on Chip En-
able or Write Enable are ignored by the memory
and do not affect bus operations.
Bus Read. Bus Read operations read from the
memory cells, or specific registers in the Com-
mand Interface. A valid Bus Read operation in-
volves setting the desired address on the Address
Inputs, applying a Low signal, V
and Output Enable and keeping Write Enable
High, V
value, see Figure 7, Read Mode AC Waveforms,
and Table 11, Read AC Characteristics, for details
of when the output becomes valid.
Bus Write. Bus Write operations write to the
Command Interface. A valid Bus Write operation
begins by setting the desired address on the Ad-
A0-A18
or V
or V
or V
or V
IH
IH
IH
IH
IL
IL
IL
IL
IH
, A9 = V
, A9 = V
, A9 = V
, A9 = V
. The Data Inputs/Outputs will output the
ID
ID
ID
ID
,
,
,
,
DQ14-DQ8
M29F800AT, M29F800AB
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
DQ15A–1, DQ14-DQ0
Data Inputs/Outpu ts
Data Inputs/Outpu ts
00ECh (M29F800AT)
0058h (M29F800AB)
Data Output
Data Input
0020h
ECh (M29F800AT)
IL
58h (M29F800AB)
Hi-Z
Hi-Z
, to Chip Enable
Data Output
Data Input
DQ7-DQ0
Hi-Z
Hi-Z
20h
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