hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 34

• Manufacturer Part Number: hyb18t512160b2fl-5
• Description: 512-mbit Double-data-rate-two Sdram
• Manufacturer: Qimonda

1)
2) Impedance measurement condition for output source dc current:
3) Mismatch is absolute value between pull-up and pull-down, both measured at same temperature and voltage.
4) This represents the step size when the OCD is near 18 ohms at nominal conditions across all process parameters and represents only the
5) The absolute value of the Slew Rate as measured from DC to DC is equal to or greater than the Slew Rate as measured from AC to AC.
6) Timing skew due to DRAM output Slew Rate mis-match between DQS / DQS and associated DQ’s is included in
7) DRAM output Slew Rate specification applies to 400, 533 and 667 MT/s speed bins.
Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
Symbol Description
—
—
—
S
OUT
V
ohms for values of
V
DRAM uncertainty. A 0 Ohm value (no calibration) can only be achieved if the OCD impedance is 18
conditions.
This is verified by design and characterization but not subject to production test.
specification.
DDQ
OUT
= –280 mV;
= 1.8 V
Output Impedance
Pull-up / Pull down mismatch
Output Impedance step size for OCD calibration
Output Slew Rate
±
0.1 V;
V
V
OUT
OUT
V
/
DD
I
between
OL
= 1.8 V
must be less than 23.4 Ohms for values of
V
±
DDQ
0.1 V
and
V
DDQ
– 280 mV. Impedance measurement condition for output sink dc current:
V
34
DDQ
Min.
0
0
1.5
= 1.7 V,
V
OUT
between 0 V and 280 mV.
V
OUT
Nominal
—
—
—
= 1420 mV; (
512-Mbit Double-Data-Rate-Two SDRAM
HY[B/I]18T512[40/80/16]0B2[C/F](L)
Max.
4
1.5
5.0
V
OCD Default Characteristics
OUT
–
±
V
0.75 Ohms under nominal
DDQ
) /
I
OH
Unit
Ω
Ω
Ω
V / ns
Internet Data Sheet
t
must be less than 23.4
DQSQ
TABLE 29
and
V
t
DDQ
QHS
Notes
1)2)
1)2)3)
4)
1)5)6)7)
= 1.7 V;